參數(shù)資料
型號: PCM3060PWR
元件分類: Codec
英文描述: 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
中文描述: 24位96/192-kHz異步立體聲音頻編解碼
文件頁數(shù): 8/45頁
文件大小: 394K
代理商: PCM3060PWR
www.ti.com
PCM3060
SLAS533–MARCH 2007
Table 1. TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
AGND1
AGND2
BCK1
BCK2
DGND
DIN
DOUT
LRCK1
LRCK2
MC/SCL/FMT
MD/SDA/DEMP
PIN
23
22
5
10
8
12
3
4
11
1
2
ADC analog ground
DAC analog ground
Audio data bit clock input/output for ADC
Audio data bit clock input/output for DAC
Digital ground
Audio data digital input for DAC
Audio data digital output for ADC
Audio data left/right clock input/output for ADC
Audio data left/right clock input/output for DAC
Mode control, clock for SPI, clock for I
2
C, format for H/W mode
(5)
Mode control, data for SPI, data for I
2
C, de-emphasis for H/W mode
This pin provides four operation modes according to its input connection. Connected directly to
V
DD
: SPI mode. Connected to VDD through 220-k
pullup resistor: H/W mode, single-ended
V
X. Connected to DGND through 220-k
pulldown resistor: H/W mode, differential V
OUT
X.
Connected directly to DGND : I
2
C mode.
Mode control, select for SPI with low active, address for I
2
C, I/F mode for H/W mode
Reset and power-down control input, active-low
System clock input for ADC
System clock input for DAC
Shield analog ground
ADC, DAC analog power supply, 5-V
ADC, DAC voltage common decoupling
Digital power supply, 3.3-V
Analog input to ADC, L-channel
Analog input to ADC, R-channel
Analog output from DAC, L-channel – in differential mode, must be open in single-ended mode
Analog output from DAC, L-channel + in differential mode, L-channel in single-ended mode
Zero flag, L-channel
Zero flag, R-channel
Analog output from DAC, R-channel – in differential mode, must be open in single-ended mode
Analog output from DAC, R-channel + in differential mode, R-channel in single-ended mode
I/O
(1)
I/O
(1)
I
(2)
O
I/O
(1)
I/O
(1)
I
(2)
I/O
(3)
MODE
28
I
(4)
MS/ADR/IFMD
RST
SCKI1
SCKI2
SGND
V
CC
V
COM
V
DD
V
IN
L
V
IN
R
V
OUT
L–
V
OUT
L+
ZEROL
ZEROR
V
OUT
R–
V
OUT
R+
27
15
6
9
16
24
21
7
25
26
19
20
14
13
17
18
I
(2)
I
(5)
I
(2)
I
(2)
I
I
O
O
O
O
O
O
(1)
(2)
(3)
(4)
(5)
Schmitt-trigger input/output with 50-k
typical internal pulldown resistor
Schmitt-trigger input, 5-V tolerant
Schmitt-trigger input, 5 V tolerant for SPI, H/W mode and Schmitt-trigger input/open drain LOW output, 5-V tolerant for I
2
C
V
/2 biased, quad-state input
Schmitt-trigger input with 50-k
typical internal pulldown resistor, 5-V tolerant
8
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