參數(shù)資料
型號: PCM3060PWR
元件分類: Codec
英文描述: 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
中文描述: 24位96/192-kHz異步立體聲音頻編解碼
文件頁數(shù): 33/45頁
文件大?。?/td> 394K
代理商: PCM3060PWR
www.ti.com
PCM3060
SLAS533–MARCH 2007
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 67
0
1
0
0
0
0
1
1
CSEL2
M/S 22
M/S 21
M/S 20
RSV
RSV
FMT21
FMT20
CSEL2: Clock Select for DAC Operation
Default value: 0 (SCKI2, BCK2, LRCK2 enabled for DAC operation)
CSEL2 = 0
CSEL2 = 1
SCKI2, BCK2, LRCK2 enabled for DAC operation (default)
SCKI1, BCK1, LRCK1 enabled for DAC operation
The CSEL2 bit controls system clock and audio interface clocks for the DAC operation.
SCKI2, BCK2, LRCK2 are used for the DAC portion if CSEL2 = 0 (default), and SCKI1, BCK1, LRCK1 are used
for DAC operation if CSEL2 = 1.
M/S 2[2:0]: Audio Interface Mode for DAC
Default value: 000 (slave mode)
M/S 2[2:0]
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Audio Interface Mode for DAC
Slave mode (default)
Master mode, 768 f
S
Master mode, 512 f
S
Master mode, 384 f
S
Master mode, 256 f
S
Master mode, 192 f
S
Master mode, 128 f
S
Reserved
The M/S 2[2:0] bits control the audio interface mode for the DAC.
FMT2[1:0]: Audio Interface Format for DAC
Default value: 00 (I
2
S Mode)
FMT2[1:0]
0 0
0 1
1 0
1 1
Audio Interface Format for DAC
24-bit I
2
S format (default)
24-bit left-justified format
24-bit right-justified format
16-bit right-justified format
The FMT2[1:0] bits control the audio interface format for the DAC.
33
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