參數(shù)資料
型號(hào): PEB2466-HV1.2
廠商: SIEMENS A G
元件分類: 編解碼器
英文描述: Four Channel Codec Filter with PCM- and m-Controller Interface SICOFI4-mC
中文描述: A/MU-LAW, PCM CODEC, PQFP64
文件頁數(shù): 16/82頁
文件大?。?/td> 3330K
代理商: PEB2466-HV1.2
PEB 2466
Functional Description
Semiconductor Group
16
02.97
Transmit Path
The analog input signal has to be DC-free connected by an external capacitor because
there is an internal virtual reference ground potential. After passing a simple antialiasing
prefilter (PREFI) the voice signal is converted to a 1-bit digital data stream in the
Sigma-Delta-converter. The first downsampling steps are done in fast running digital
hardware filters. The following steps are implemented in the micro-code which has to be
executed by the central Digital Signal Processor. This DSP-machine is able to handle
the workload for all four channels. At the end the fully processed signal (flexibly
programmed in many parameters) is transferred to the PCM- interface in a
PCM-compressed signal representation.
Receive Path
The digital input signal is received via the PCM interface. Expansion,
PCM-Law-pass-filtering, gain correction and frequency response correction are the next
steps which are done by the DSP-machine. The upsampling interpolation steps are
again processed by fast hardware structures to reduce the DSP-workload. The
upsampled 1-bit data stream is then converted to an analog equivalent which is
smoothed by a POST-Filter (POFI). As the signal
V
OUT
is also referenced to an internal
virtual ground potential, an external capacitor is required for DC-decoupling.
Loops
There are two loops implemented. The first is to generate the AC-input impedance (IM)
and the second is to perform a proper hybrid balancing (TH). A simple extra path IM2
(from the transmit to the receive path) supports the impedance matching function.
Test Features
There are four analog and five digital test loops implemented in the SICOFI-4. For
special tests it is possible to Cut Off the receive and the transmit path at two different
points.
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