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參數(shù)資料
| 型號(hào)： | PEB2466-HV1.2 |
| 廠商： | SIEMENS A G |
| 元件分類： | 編解碼器 |
| 英文描述： | Four Channel Codec Filter with PCM- and m-Controller Interface SICOFI4-mC |
| 中文描述： | A/MU-LAW, PCM CODEC, PQFP64 |
| 文件頁(yè)數(shù)： | 45/82頁(yè) |
| 文件大?。?/td> | 3330K |
| 代理商： | PEB2466-HV1.2 |
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PEB 2466
Programming the SICOFI
-4-
μ
C
Semiconductor Group
45
02.97
3.5.5
Register XR4 provides two optional functions: debouncing of signaling input changes,
and the configuration of the programmable output pin CHCLK1.
XR4 Extended Register 4
Signaling Debounce Interval N
To restrict the rate of changes on signaling input pins transferred, deglitching of the
status information from the SLIC may be applied. New status information will be read into
registers XR0, XR1, XR2 and XR3, and an interrupt on pin INT12 (INT34) will be
generated, after it has been stable for N milliseconds. N is programmable in the range of
2 to 30 ms in steps of 2 ms, with N = 0 the debouncing is disabled.
Configuration of CHCLK1
Bit 7
0
N
T
Field N
Debounce Interval Time
Debounce and interrupt generation is disabled
Debounce period 2 ms
Debounce period 4 ms
.
.
Debounce period 28 ms
Debounce period 30 ms
0
0
0
.
.
1
1
0
0
0
.
.
1
1
0
0
1
.
.
1
1
0
1
0
.
.
0
1
Field T
0
0
0
.
.
1
1
Frequency applied to Pin CHCLK1
CHCLK1 is set to 1 permanently
T is 2ms
T is 4ms
.
.
T is 28 ms
CHCLK1 is set to 0 permanently
0
0
0
.
.
1
1
0
0
1
.
.
1
1
0
1
0
.
.
0
1
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| PEB2466HV2.2 | 功能描述:接口—CODEC POTS RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PEB2466-HV2.2 | 制造商:Infineon Technologies AG 功能描述:PCM CODEC, Quad, 64 Pin, Plastic, QFP |
| PEB2466HV2.2/TR | 制造商:Lantiq 功能描述: |
| PEB2466HV2.2TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| PEB2466HV22XP | 制造商:Lantiq 功能描述:ICS FOR COMMUNICATIONS |
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