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參數(shù)資料
| 型號(hào)： | PEB2466-HV1.2 |
| 廠(chǎng)商： | SIEMENS A G |
| 元件分類(lèi)： | 編解碼器 |
| 英文描述： | Four Channel Codec Filter with PCM- and m-Controller Interface SICOFI4-mC |
| 中文描述： | A/MU-LAW, PCM CODEC, PQFP64 |
| 文件頁(yè)數(shù)： | 18/82頁(yè) |
| 文件大小： | 3330K |
| 代理商： | PEB2466-HV1.2 |
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PEB 2466
Functional Description
Semiconductor Group
18
02.97
2.2
Two serial PCM-interfaces are used for the transfer of A- or
μ
-law compressed voice
data. The PCM-interface consist of 8 pins:
The PCM-interface
The Frame Sync FSC pulse identifies the beginning of a receive and transmit frame for
all of the four channels. The PCLK clock is the signal to synchronize the data transfer on
both lines DXA (DXB) and DRA (DRB). Bytes in all channels are serialized to 8 bit width
and MSB first. As a default setting, the rising edge indicates the start of the bit, while the
falling edge is used to latch the contents of the received data on DRA (DRB). If the
double clock rate is chosen (twice the transmission rate) the first rising edge indicates
the start of a bit, while the second falling edge is used for latching the contents of the
data line DRA (DRB) by default.
The data rate of the interface can vary from 2
×
128 kbit/s to 2
×
8192 kbit/s (2 highways)
A frame may consist of up to 128 time slots of 8 bits each. In the Time Slot Configuration
Registers CR5 and CR6 the user can select an individual time slot, and an individual
PCM-highway, for any of the four voice channels. Receive and transmit time slots can
also be programmed individually. An extra delay of up to 7 clocks, valid for all channels,
as well as the sampling slope may be programmed (see XR6).
When the SICOFI-4-
μ
C is transmitting data on DXA (DXB), pin TCA (TCB) is activated
to control an extra external driving device.
PCLK:
FSC:
DRA:
DRB:
DXA:
DXB:
TCA:
TCB:
PCM-Clock, 128 kHz to 8192 kHz
Frame Synchronization Clock, 8 kHz
Receive Data input for PCM-highway A
Receive Data input for PCM-highway B
Transmit Data output for PCM-highway A
Transmit Data output for PCM-highway B
Transmit Control Output for PCM-highway A, active low during transmission
Transmit Control Output for PCM-highway B, active low during transmission
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEB2466HV2.2 | 功能描述:接口—CODEC POTS RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PEB2466-HV2.2 | 制造商:Infineon Technologies AG 功能描述:PCM CODEC, Quad, 64 Pin, Plastic, QFP |
| PEB2466HV2.2/TR | 制造商:Lantiq 功能描述: |
| PEB2466HV2.2TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| PEB2466HV22XP | 制造商:Lantiq 功能描述:ICS FOR COMMUNICATIONS |
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