參數(shù)資料
型號(hào): PEB24902
廠商: SIEMENS A G
元件分類: 數(shù)字傳輸電路
英文描述: Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE
中文描述: DATACOM, ISDN ECHO CANCELLER, PQFP64
文件頁數(shù): 26/50頁
文件大?。?/td> 502K
代理商: PEB24902
PEB 24902
PEF 24902
Technical Description
Semiconductor Group
26
05.96
3.2.2
In case the signal input is too high (low attenuation on short loops), the range function
can be activated. The range function attenuates the received signal internally by 6 dB.
The range function is activated by setting the RANGE bit on SDX to ONE.
Range Function
3.2.3
The output pulse is shaped by a special DAC. The DAC is optimized for excellent
matching between positive and negative pulses and high linearity. It uses a fully
differential switched capacitor approach. The staircase-like output signal of the DAC
drives the output buffers. The shape of a DAC output signal is shown below, the peak
amplitude is normalized to one. This signal is fed to an RC low pass of first order.
Digital-to-Analogue Converter
Figure 10
DAC Output for a Single Pulse
The duration of each pulse is 24 steps, with t = 0.78 sec per step for 2B1Q code and 0.52
sec per step for 4B3T code. The pulse rate is one pulse per 16 steps, e.g. 80 kHz for
2B1Q code and 120 kHz for 4B3T code. Thus, the subsequent pulses are overlapping
for a duration of 8 steps.
The output stage consists of two identical buffers, operated in a differential mode. The
buffers are optimized for:
– high output swing
– high linearity
– low quiescent current to minimize power consumption
The pulse mask for a single +3 2B1Q-pulse measured between AOUTx and BOUTx at
a load of 98
is given in
figure 11
:
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