參數(shù)資料
型號(hào): PEB24902
廠(chǎng)商: SIEMENS A G
元件分類(lèi): 數(shù)字傳輸電路
英文描述: Quad ISDN Echocancellation Circuit Analogue Front End Quad IEC AFE
中文描述: DATACOM, ISDN ECHO CANCELLER, PQFP64
文件頁(yè)數(shù): 31/50頁(yè)
文件大?。?/td> 502K
代理商: PEB24902
PEB 24902
PEF 24902
Technical Description
Semiconductor Group
31
05.96
3.2.5
The loop-back bit (LOOP) set to ONE on SDX activates an internal analogue loop-back.
This loop-back is closed near the U interface. Signals received on AINx / BINx will neither
be evaluated nor recognized by the ADC. The output signal is attenuated by 17 dB and
fed to the inputs of the ADC and level detect circuit instead. It is still available at AOUTx
/ BOUTx.
Figure 15
shows a schematic of the loop-back function.
Analogue Loop-back Function
Table 7
Transformer Parameters
Parameter
Transformation ratio;
Device side : Line side
Main inductance of
windings on the line side
Leakage inductance of
windings on the line side
Coupling capacitance
between the windings on
the device side and the
windings on the line side
DC resistance of the
windings on device side
DC resistance of the
windings on line side
Symbol
n
2B1Q
1:1.6
4B3T
1:1.32
Unit
L
H
14.5
7.9
mH
L
S
90
50
μH
C
K
100
75
pF
R
Cu, B
2.8
1.9
R
Cu, L
2.7
1.3
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