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參數(shù)資料
| 型號(hào)： | PEF20324 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | ICs for Communications |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 18/63頁 |
| 文件大?。?/td> | 705K |
| 代理商： | PEF20324 |
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PEB 20324
PEF 20324
Pin Descriptions
Hardware Reference Manual
18
04.99
Table 2-2
Pin No.
107
Pin Descriptions by Functional Block: Port 1 Serial Interface
Symbol
Type Description
RxCLK1
I
Receive Clock 1
The clock input pin used for sampling the data on
RxD1 The MUNICH128X supports the following PCM
clock rates, programmed via the MODE1 register:
T1: 1.536 MHz, 1.544 MHz, 3.088 MHz, 6.176 MHz;
E1: 2.048 MHz, 4.096 MHz, 8.192 MHz.
RxD1
I
Receive Data 1
The data input pin which is sampled using RxCLK1.
RSP1
I
Receive Synchronization Pulse 1
The input pin used for Rx PCM frame synchronization;
the synchronization pulse marks the firstbit in the
PCM frame.
TxCLK1
I
Transmit Clock 1
The clock input used for clocking out the data on
TxD1. In most applications, the signal that drives this
pin is externally connected to RxCLK1.
TxD1
O
Transmit Data 1
Provides the data which is clocked out of the
MUNICH128X by TxCLK1; data is push-pull for active
bits in the PCM frame and TRISTATE
for inactive
bits.
TSP1
I
Transmit Synchronization Pulse 1
The input pin used for Tx PCM frame synchronization;
the synchronization pulse marks the lastbit in the
PCM frame.
TxDEN1
O
Transmit Data Enable 1
An active low output signal which specifies data on the
TxD1 output pin is valid.
105
106
97
99
98
100
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| PEB20324 | ICs for Communications |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEF20324HV2.2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| PEF2035NV4.1ACFA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PEF2035NV4.1-ACFA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PEF2041N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecom Switching Circuit |
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