參數(shù)資料
型號: PEF20324
廠商: INFINEON TECHNOLOGIES AG
英文描述: ICs for Communications
中文描述: 通信集成電路
文件頁數(shù): 52/63頁
文件大?。?/td> 705K
代理商: PEF20324
PEB 20324
PEF 20324
Electrical Characteristics
Hardware Reference Manual
52
04.99
Note: The PCI parity signal PAR is not generated in de-multiplexed mode. It is driven
active low by the MUNICH128X.
Table 5-10
Parameter
Additional De-multiplexed Interface Signal Characteristics
Limit Values
min.
typ.
CLK to address bus signal
valid delay
CLK to W/R signal valid
delay
Address bus Input setup
time to CLK
Address bus Input hold time
to CLK
W/R signal Input setup time
to CLK
W/R signal Input hold time
to CLK
Unit
Remarks
max.
12
ns
12
ns
8
ns
0
ns
8
ns
0
ns
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