參數(shù)資料
型號(hào): PEF2080
廠商: SIEMENS AG
英文描述: S/T Bus Interface Circuit(SBC)
中文描述: S / T的總線接口電路(SBC)的
文件頁(yè)數(shù): 30/74頁(yè)
文件大小: 2620K
代理商: PEF2080
Semiconductor Group
31
Functional Description
D-channel access control
The D-channel access control ensures that only one terminal shall have access to the D channel at
any time. This is achieved through collision detection by each terminal (CCITT I.430). The SBC
MONITORS the received D-echo channel, and, when transmission in the D channel is started,
compares the echo bits to the transmitted D bits.
A mismatch between D bit and D-echo bit means that another terminal is also transmitting and a
collision has taken place. This can only happen if D = 1 and D-echo = 0, since on the S bus a logical
0 overrides a logical 1 (thus the comparison of D echo with D bit is performed only when
D echo = logical 0). The SBC immediately ceases transmission, returns to the D-channel
monitoring state and sends 1’s in the D channel. D-channel access is possible only after x
consecutive 1’s have been received in the echo channel. Depending on the priority class, x can be
either eight or ten. If a terminal has successfully transmitted a complete HDLC frame, x is
automatically increased by 1. X is reset to its initial value of eight (ten) when nine (eleven)
consecutive 1’s are received in the echo channel.
To enable initiating and interrupting HDLC frame transmission in the D channel, the SBC has to
inform the layer-2 controller (ISDN Communication Controller) of the D-channel status — “ready” or
“busy”. For this, bit 20 of the IOM frame, in other words the fourth bit from the right in the MONITOR
channel, is used:
see figure 15
.
Figure 15
Position of BUSY Bit in IOM
Frame
D
C/I
T
E
D
S-Bus D-Channel
not Available
Busy = 1
S-Bus D-Channel
Available
Busy = 0
SDO
B1
B2
MONITOR
B*
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