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參數(shù)資料
| 型號： | PEF2080 |
| 廠商： | SIEMENS AG |
| 英文描述： | S/T Bus Interface Circuit(SBC) |
| 中文描述： | S / T的總線接口電路（SBC）的 |
| 文件頁數(shù)： | 37/74頁 |
| 文件大?。?/td> | 2620K |
| 代理商： | PEF2080 |
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Semiconductor Group
38
3
Operational Description
3.1
General
The internal finite state machine of the SBC controls the activation/deactivation procedures,
switching of test loops and transmission of special pulse patterns. Such actions can be initiated by
signals on the S transmission line (INFO’s) or by control (C/l) codes sent over the IOM interface.
The exchange of control information in the C/l channel is state oriented. This means that a code in
the C/l channel is repeated in every IOM frame until a change is necessary. A new code must be
found in two consecutive IOM frames to be considered valid (double last look criterion).
3.2
Clocking, Reset and Initialization
In LT-T and LT-S applications the IOM interface should be kept active, i.e. the clocks DCL and FSC
are always present. In this case commands in the C/l channel may also be handed over to the SBC
in the “power down” state (state F3 for LT-T/state G1 for LT-S:
see figures 24 and 25
).
In TE and NT applications the IOM interface can be switched off in the inactive state, reducing
power consumption to a minimum (on the order of 5 mW and 6.5 mW for PEB and PEF,
respectively). In this deactivated state the clock lines are low and the data lines are high.
For the TE case the procedure is shown in
figure 20
. After detecting the code DIU (Deactivate
Indication Upstream, i.e. from TE to NT/LT-S) from the downstream unit, the SBC responds by
transmitting DID (Deactivate Indication Downstream) during subsequent frames and stops the
timing signals synchronously with the end of the last C/l channel bit of the fourth frame.
Figure 20
Deactivation of the IOM
Interface
Operational Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEF2080-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:S/T Bus Interface Circuit(SBC) |
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