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參數(shù)資料
| 型號(hào)： | PEF2080 |
| 廠商： | SIEMENS AG |
| 英文描述： | S/T Bus Interface Circuit(SBC) |
| 中文描述： | S / T的總線接口電路（SBC）的 |
| 文件頁(yè)數(shù)： | 31/74頁(yè) |
| 文件大小： | 2620K |
| 代理商： | PEF2080 |
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Semiconductor Group
32
Functional Description
By sending the BUSY bit at 0 to the ISDN Communication Controller in anticipation of the S-bus D-
channel “ready” state, the first valid D bits will emerge from the SBC at exactly the moment an
access is allowed.
D-channel switching (blocked: D = 1, or transparent: D = HDLC) is described by the state diagram
in
figure 15a
with BUSY bit states “ready” and “busy” as input variables.
Figure 15b
shows the
status diagram for “ready” and “busy”, with the following variables:
P:
C:
V:
priority (8 or 10), set by a C/l channel command
number of consecutive ones appearing in the echo channel
V = 1 if: transmitted D bit = received D-echo bit
V = 0 otherwise
priority decrement for priority class P
(P = 8 or 10).
D
P
:
Thus state 1 is the state where a D-channel access may be attempted. The transition “1” - “2” occurs
at the first zero of an opening flag (C = 0: zero observed in D-echo channel, and V = 1: a zero has
actually been transmitted). Transition “i - 0” (i = 1,2,3) occurs at the first monitored zero in the echo
channel when the station is idle (“1” - “0”), or if a collision either within an opening flag (“2” - “0”) or
between the opening and closing flags (“3” - “0”) of an HDLC frame is observed. The successful
transmission of a closing flag (“3” - “0” conditioned by C = 6) must be followed by a decrement in
the priority class (D
P
= 1 ). D
P
is reset when 9 or 11 consecutive 1’s are observed (state “1”): cf
CCITT I.430.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PEF22554 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF22554E | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF22554HT | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF2256 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF2256E | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEF2080-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:S/T Bus Interface Circuit(SBC) |
| PEF2091 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Communications(ISDN Echocancellation Circuit) |
| PEF2091F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?ISDN Echocancellation Circuit - 2B1Q Code? |
| PEF2091FV5.3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Communications(ISDN Echocancellation Circuit) |
| PEF2091HV5.3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Communications(ISDN Echocancellation Circuit) |
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