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參數(shù)資料
| 型號： | pentium pro processor |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
| 中文描述： | 奔騰Pro處理器在200MHz（1兆比特二級高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存） |
| 文件頁數(shù)： | 13/39頁 |
| 文件大?。?/td> | 930K |
| 代理商： | PENTIUM PRO PROCESSOR |
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E
AP-523
13
Table 1. Timing Parameters of Compatibility Pins
Minimum
t#
Parameter
Maximum
Units
t1
RESET# active to CRESET#
10
ns
t2
RESET# active to Ratio Delay
5
BCLKs
t3
BCLK to CRESET# Inactive
10
ns
t4
BCLK to Compatibility
20
BCLKs
t5
Ratio Setup to RESET# rising
1
ms
Using CRESET#, the circuit in Figure 11 can be used to
share the pins. The pins of the processors are bussed
together to allow any one of them to be the compatibility
processor. The component used as the multiplexer must
not be powered by more than 3.3V in order to meet the
3.3V tolerant buffer specifications of the Pentium Pro
processor. The multiplexer output current should be
limited to 200 mA maximum, in case the 3.1V supply
does not come up.
The pull-down resistors between the multiplexer and the
processor (1K ohms) forces a ratio of 2:1 into the
processor in the event that the Pentium Pro processor
powers up before the multiplexer and/or the chipset. This
prevents the processor from ever seeing a ratio higher
than the final ratio. These are unnecessary if another
known ground path through the multiplexer exists when
3.3V is off.
If the multiplexer were powered by V
CC
P, CRESET#
would still be unknown until the 3.3V supply came up to
power the chipset. A pull-down can be used on
CRESET# instead of the four between the multiplexer
and the Pentium Pro processor in this case. In this case,
the multiplexer must be designed such that the
compatibility inputs are truly ignored as their state is
unknown.
In any case, the compatibility inputs to the multiplexer
must meet the input specifications of the multiplexer.
This may require a level translation before the
multiplexer inputs unless the inputs and the signals
driving them are already compatible.
Compatibility
Signals
From System
Ratio
P6
CRESET#
P6
Pentium
Pro
processor
3.3V
Mux
Figure 11. Schematic of Pin Sharing
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