參數(shù)資料
型號(hào)： pentium pro processor
廠商： Intel Corp.
英文描述： Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器)
中文描述： 奔騰Pro處理器在200MHz（1兆比特二級(jí)高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存）
文件頁(yè)數(shù)： 38/39頁(yè)
文件大?。?/td> 930K
代理商： PENTIUM PRO PROCESSOR
AP-523
E
38
Shock and Vibration
GUIDELINE
The DC-to-DC converter must not be damaged and the
interconnect integrity not compromised during:
·
A shock of 50G with an 11 millisecond half sine
wave, non-operating, the shock to be applied in
each of the orthogonal axes.
·
Vibration of 0.01G
2
per Hz at 5 Hz, sloping to
0.02G
2
per Hz at 20 Hz and maintaining 0.02G
2
per
Hz from 20 Hz to 500 Hz, non-operating, applied in
each of the orthogonal axes.
Electromagnetic
GUIDELINE
Design, including materials, must be consistent with the
manufacture of units that comply with the limits of FCC
Class B and VDE 243 Level B for radiated emissions,
given the existence of an external package around the
converter with 20 dB of shielding.
Reliability
GUIDELINE
The converter must be designed to function to electrical
specifications, within the environmental specifications,
with 60°C air at a velocity of 100 LFM directed along the
connector axis.
10.3.1.
Component De-rating GUIDELINE
The following component de-rating guidelines must be
followed:
·
Semiconductor junction temperatures must be <
115°C with ambient at 50°C.
·
Capacitor case temperature must not exceed 80% of
rated temperature.
·
Resistor wattage de-rating must be > 50%.
·
Component voltage and current de-rating must be >
20%, the effects of ripple current heating must be
accounted for in this de-rating.
10.3.2.
Mean Time Between
Failures (MTBF)
GUIDELINE
Design, including materials, must be consistent with the
manufacture of units with an MTBF of 500,000 hours of
continuous operation at 55°C, maximum-outputs load,
and
requirements. MTBF must be calculated in accordance
with MIL-STD-217F.
worst-case
line,
while
meeting
specified
Safety
GUIDELINE
Design, including materials, must be consistent with the
manufacture of units that meet the standards of UL
flammability specifications per 94V-0.
11.0 Pentium
Pro Processor Power
Distribution Network Modeling
The following power model is provided in HSPICE
format to allow simulation of the power distribution sub-
system. This is the same model used by Intel for
simulation of early power supply solutions. It is a Norton
equivalent circuit created to estimate a worst case di/dt of
about 1.0A/ns with a peak current of 10 Amps and a
minimum current of 0A. This model is for a 150MHz
clock and includes the switching transients that can occur
during full power operation, as well as the initial current
ramp from low to high current states. A similar effect
occurs when entering stop clock from full power. This
can also be modeled by changing this model
symetrically.
This information should be used solely as a baseline for
system development and should be followed by actual
measurements of the power islands as explained in
Section 8.
11.1.
Using the Power Distribution
Model
This model assumes a peak current of 10 Amps and a
minimum current of 0 Amps. This is only a slightly wider
swing than the specification for the 150MHz Pentium Pro
processor. To design for a flexible motherboard, one
should scale this model upwards. Note that a change in
frequency will affect this model somewhat, but not
drastically.
This model includes a socket that meets the guideline of
4.5nH mated inductance per pin. DO NOT ADD A
SOCKET INTO YOUR MODEL as this is already
comprehended in the Pentium Pro processor power
model.
The model presented here has been shown to correlate
with the Intel’s internal models within the range of
normal operation. However, as the voltage at the Pentium
Pro processor pins departs from the ±5% voltage
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