參數(shù)資料
型號(hào): PI7C7300NA
廠商: PERICOM SEMICONDUCTOR CORP
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA272
封裝: PLASTIC, BGA-272
文件頁數(shù): 61/119頁
文件大小: 880K
代理商: PI7C7300NA
PI7C7300
3-PORT PCI-to-PCI BRIDGE
Advanced Information
36
06/04/02 Revision 1.07
values before setting either the memory enable bit or the master enable
bit in the command register in configuration space.
To turn off the prefetchable memory address range, write the prefetchable memory
base address register with a value greater than that of the prefetchable memory limit
address register. The entire base value must be greater than the entire limit value,
meaning that the upper 32 bits must be considered. Therefore, to disable the address
range, the upper 32 bits registers can both be set to the same value, while the lower
base register is set greater than the lower limit register. Otherwise, the upper 32-bit
base must be greater than the upper 32-bit limit.
5.4
VGA Support
PI7C7300 provides two modes for VGA support:
§
VGA mode, supporting VGA-compatible addressing
§
VGA snoop mode, supporting VGA palette forwarding
5.4.1
VGA Mode
When a VGA-compatible device exists downstream from PI7C7300, set the VGA
mode bit in the bridge control register in configuration space to enable VGA mode.
When PI7C7300 is operating in VGA mode, it forwards downstream those transactions
addressing the VGA frame buffer memory and VGA I/O registers, regardless of the
values of the base and limit address registers. PI7C7300 ignores transactions initiated
on the secondary interface addressing these locations.
The VGA frame buffer consists of the following memory address range:
000A 0000h–000B FFFFh
Read transactions to frame buffer memory are treated as non-prefetchable. PI7C7300
requests only a single data transfer from the target, and read byte enable bits are
forwarded to the target bus.
The VGA I/O addresses are in the range of 3B0h–3BBh and 3C0h–3DFh I/O.
These I/O addresses are aliases every 1KB throughout the first 64KB of I/O space.
This means that address bits <15:10> are not decoded and can be any value, while
address bits [31:16] must be all 0s. VGA BIOS addresses starting at C0000h are not
decoded in VGA mode.
5.4.2
VGA Snoop Mode
PI7C7300 provides VGA snoop mode, allowing for VGA palette write transactions to
be forwarded downstream. This mode is used when a graphics device downstream
from PI7C7300 needs to snoop or respond to VGA palette write transactions.
To enable the mode, set the VGA snoop bit in the command register in configuration
space. Note that PI7C7300 claims VGA palette write transactions by asserting
DEVSEL# in VGA snoop mode.
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