TM Family Datasheet Page 50 of 81 June 2009 – " />
參數(shù)資料
型號(hào): PI7C9X20505GPBNDE
廠商: Pericom
文件頁(yè)數(shù): 46/81頁(yè)
文件大?。?/td> 0K
描述: IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告: Copper Wire Change 26/Sept/2011
標(biāo)準(zhǔn)包裝: 90
系列: GreenPacket™
應(yīng)用: 封裝開(kāi)關(guān),5 端口/5 線道
接口: PCI Express
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(17x17)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 50 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
17
GPIO [4] Output
Enable
RW
0b: GPIO [4] is an input pin
1b: GPIO [4] is an output pin
Reset to 0b.
18
GPIO [4] Output
Register
RW
Value of this bit will be output to GPIO [4] pin if GPIO [4] is configured as
an output pin.
Reset to 0b.
19
Reserved
RO
Reset to 0b.
20
GPIO [5] Input
RO
State of GPIO [5] pin.
21
GPIO [5] Output
Enable
RW
0b: GPIO [5] is an input pin
1b: GPIO [5] is an output pin
Reset to 0b.
22
GPIO [5] Output
Register
RW
Value of this bit will be output to GPIO [5] pin if GPIO [5] is configured as
an output pin.
Reset to 0b.
23
Reserved
RO
Reset to 0b.
24
GPIO [6] Input
RO
State of GPIO [6] pin.
25
GPIO [6] Output
Enable
RW
0b: GPIO [6] is an input pin
1b: GPIO [6] is an output pin
Reset to 0b.
26
GPIO [6] Output
Register
RW
Value of this bit will be output to GPIO [6] pin if GPIO [6] is configured as
an output pin.
Reset to 0b.
27
Reserved
RO
Reset to 0b.
28
GPIO [7] Input
RO
State of GPIO [7] pin.
29
GPIO [7] Output
Enable
RW
0b: GPIO [7] is an input pin
1b: GPIO [7] is an output pin
Reset to 0b.
30
GPIO [7] Output
Register
RW
Value of this bit will be output to GPIO [7] pin if GPIO [7] is configured as
an output pin.
Reset to 0b.
31
Reserved
RO
Reset to 0b.
7.2.59
EEPROM CONTROL REGISTER – OFFSET DCh (Upstream Port Only)
BIT
FUNCTION
TYPE
DESCRIPTION
0
EEPROM Start
RW
Starts the EEPROM read or write cycle.
Reset to 0b.
1
EEPROM Command
RW
Sends the command to the EEPROM.
0b: EEPROM read
1b: EEPROM write
Reset to 0b.
2
EEPROM Error
Status
RO
1b: EEPROM acknowledge was not received during the EEPROM cycle.
Reset to 0b.
3
EEPROM Autoload
Success
RO
0b: EEPROM autoload was unsuccessful or is disabled
1b: EEPROM autolad occurred successfully after RESET. Configuration
registers were loaded with values in the EEPROM
It will be cleared when read at this bit.
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