TM Family Datasheet Page 67 of 81 June 2009 – " />
參數(shù)資料
型號： PI7C9X20505GPBNDE
廠商： Pericom
文件頁數(shù)： 64/81頁
文件大小： 0K
描述： IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告： Copper Wire Change 26/Sept/2011
標準包裝： 90
系列： GreenPacket™
應(yīng)用： 封裝開關(guān)，5 端口/5 線道
接口： PCI Express
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（17x17）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 67 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
16
Load Port
Arbitration Table
RW
When set, the programmed Port Arbitration Table is applied to the
hardware. This bit always returns 0b when read.
Reset to 0b.
19:17
Port Arbitration
Select
RW
This field is used to configure the Port Arbitration by selecting one of the
supported Port Arbitration schemes. The permissible values for the
schemes supported by Switch are 000b, 011b and 100b at VC1, other value
than these written into this register will be treated as default.
Reset to 000b.
23:20
Reserved
RO
Reset to 0h.
26:24
VC ID
RW
This field assigns a VC ID to the VC resource.
Reset to 001b.
30:27
Reserved
RO
Reset to 0h.
31
VC Enable
RW
0b: it disables this Virtual Channel
1b: it enables this Virtual Channel
Reset to 0b.
7.2.96
VC RESOURCE STATUS REGISTER (1) – OFFSET 164h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Reserved
RO
Reset to 0000h.
16
Port Arbitration
Table Status
RO
When set, it indicates that any entry of the Port Arbitration Table is written by
software. This bit is cleared when hardware finishes loading values stored in
the Port Arbitration Table after the bit of “Load Port Arbitration Table” is set.
Reset to 0b.
17
VC Negotiation
Pending
RO
When set, it indicates that the VC resource is still in the process of
negotiation. This bit is cleared after the VC negotiation is complete.
Reset to 0b.
31:18
Reserved
RO
Reset to 0.
7.2.97
VC ARBITRATION TABLE REGISTER – OFFSET 170h
The VC arbitration table is a read-write register array that contains a table for VC arbitration. Each
table entry allocates four bits, of which three bits are used to represent VC ID and one bit is reserved.
A total of 32 entries are used to construct the VC arbitration table. The layout for this register array is
shown below.
Table 7-1 Register Array Layout for VC Arbitration
31 - 28
27 - 24
23 - 20
19 - 16
15 - 12
11 - 8
7 - 4
3 - 0
Byte Location
Phase
[7]
Phase
[6]
Phase
[5]
Phase
[4]
Phase
[3]
Phase
[2]
Phase
[1]
Phase
[0]
00h
Phase
[15]
Phase
[14]
Phase
[13]
Phase
[12]
Phase
[11]
Phase
[10]
Phase
[9]
Phase
[8]
04h
Phase
[23]
Phase
[22]
Phase
[21]
Phase
[20]
Phase
[19]
Phase
[18]
Phase
[17]
Phase
[16]
08h
Phase
[31]
Phase
[30]
Phase
[29]
Phase
[28]
Phase
[27]
Phase
[26]
Phase
[25]
Phase
[24]
0Ch
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參數(shù)描述
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
PI7C9X20508GPBEVB 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20508GPBNDE 功能描述:外圍驅(qū)動器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPNDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays
PI7C9X2G303ELAEVB 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA
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