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參數(shù)資料
| 型號： | PI7C9X20505GPBNDE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 71/81頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 256BGA |
| 產(chǎn)品變化通告： | Copper Wire Change 26/Sept/2011 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | GreenPacket™ |
| 應(yīng)用： | 封裝開關(guān)，5 端口/5 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 73 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
10.4 BOUNDARY SCAN REGISTER
The boundary scan register has a set of serial shift-register cells. A chain of boundary scan cells is formed by
connected the internal signal of the PI7C9X20505GP package pins. The VDD, VSS, and JTAG pins are not in the
boundary scan chain. The input to the shift register is TDI and the output from the shift register is TDO. There are 4
different types of boundary scan cells, based on the function of each signal pin.
The boundary scan register cells are dedicated logic and do not have any system function. Data may be loaded into
the boundary scan register master cells from the device input pins and output pin-drivers in parallel by the
mandatory SAMPLE and EXTEST instructions. Parallel loading takes place on the rising edge of TCK.
10.5 JTAG BOUNDARY SCAN REGISTER ORDER
Table 10-3 JTAG boundary scar register definition
Boundary Scan
Register Number
Pin Name
Ball Location
Type
Tri-state Control Cell
0
CLKREQ1_L
H15
Input
1
DWNRST_L[1]
P11
Output2
2
CLKREQ2_L
P12
Input
3
DWNRST_L[2]
P13
Output2
4
CLKREQ3_L
N14
Input
5
DWNRST_L[3]
L14
Output2
6
PERST_L
K14
Input
7
WAKE_L
H14
Input
8
DEBUG_OUT[0]
G14
Bidir
14
9
DEBUG_OUT[1]
D16
Bidir
14
10
DEBUG_OUT[2]
D15
Bidir
14
11
DEBUG_OUT[3]
C16
Bidir
14
12
DEBUG_OUT[4]
C15
Bidir
14
13
DEBUG_OUT[5]
C14
Bidir
14
Control
15
DEBUG_OUT[6]
B16
Bidir
14
16
DEBUG_OUT[7]
B15
Bidir
14
17
DEBUG_OUT[8]
B14
Bidir
14
18
DEBUG_OUT[9]
A16
Bidir
14
19
DEBUG_OUT[10]
A15
Bidir
14
20
DEBUG_OUT[11]
A14
Bidir
14
21
GPIO[0]
A13
Bidir
22
Control
23
GPIO[1]
B13
Bidir
24
Control
25
GPIO[2]
A12
Bidir
26
Control
27
GPIO[3]
B12
Bidir
28
Control
29
GPIO[4]
A11
Bidir
30
Control
31
GPIO[5]
B11
Bidir
32
Control
33
GPIO[6]
A10
Bidir
34
Control
35
GPIO[7]
B10
Bidir
36
Control
37
PWR_IND[1]
D2
Output2
38
PWR_IND[2]
E1
Output2
39
PWR_IND[3]
F1
Output2
40
ATT_IND[1]
G3
Output2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C9X20508GPANDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube |
| PI7C9X20508GPBEVB | 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
| PI7C9X20508GPBNDE | 功能描述:外圍驅(qū)動器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C9X20508GPNDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays |
| PI7C9X2G303ELAEVB | 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA |
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