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參數(shù)資料
| 型號： | PI7C9X7952AFDE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 52/68頁 |
| 文件大小： | 0K |
| 描述： | IC PCIE-TO-UART BRIDGE 128LQFP |
| 標準包裝： | 90 |
| 應用： | PCIe至UART橋接 |
| 接口： | 高級配置電源接口（ACPI） |
| 電源電壓： | 1.8V, 3.3V |
| 封裝/外殼： | 128-LQFP 裸露焊盤 |
| 供應商設(shè)備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X7952
PCI Express Dual UART
Datasheet
Page 56 of 68
May 2013 – Revision 1.4
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
character(s). When this occurs, the UART will disable
transmission as soon as any current character transmission is
complete. The UART then compares the received data with the
programmed XON character(s). When a match occurs, the
UART will re-enable transmission (see section 7.11.6).
00b: In-band receive flow control is disabled.
01b: Single character in-band receive flow control enabled,
recognising XON2 as the XON character and XOFF2 as the
XOFF character.
10b: Single character in-band receive flow control enabled,
recognising XON1 as the XON character and XOFF1 and
the XOFF character.
11b: The behavior of the receive flow control is dependent on the
configuration of EFR[3:2]. Single character in-band receive
flow control is enabled, accepting XON1 or XON2 as valid
XON characters and XOFF1 or XOFF2 as valid XOFF
characters when EFR[3:2] = “01” or “10”. EFR[1:0] should
not be set to “11” when EFR[3:2] is ‘00’.
Reset to 00b.
3:2
In-Band Transmit
Flow Control Mode
RW
When in-band transmit flow control is enabled, XON/XOFF
character are inserted into the data stream whenever the
RFL passes the upper trigger level and falls below the lower
trigger level respectively. For automatic in-band flow control, bit
4 of EFR must be set. The combinations of software transmit
flow control can then be selected by programming EFR[3:2] as
follows.
00b:
In
-band transmit flow control is disabled logic.
01b:
Single character in
-band transmit flow control enabled,
using XON2 as the XON character and XOFF2 as the
XOFF character.
10b:
Single character in
-band transmit flow control enabled,
using XON1 as the XON character and XOFF1 as the
XOFF character.
11b: The value EFR[3:2] = “11” is reserved for future use and
should not be used
Reset to 00b.
4
Enhanced Mode
RW
0b:
Non
-Enhanced mode.
1b:
Enhanced mode. Enables the Enhanced Mode
functions. If
use addition function except 16550 mode.
Reset to 0b.
5
Special Character
Detection Enable
RW
0b: Special character detection is disabled.
1b: While in Enhanced mode (EFR[4]=1), the UART compares
the incoming receiver data with the XOFF1 or XOFF2 value
and interrupt will be asserted.
If In-Band Flow Control is enabled, this bit must be set to ‘1’.
Reset to 0b.
6
Automatic RTS
Flow Control
Enable
RW
0b: RTS flow control is disabled.
1b: RTS flow control is enabled in Enhanced mode (i.e. EFR[4]
= 1), where the RTS# pin will be forced inactive high if the
RFL reaches the upper flow control threshold. This will be
released when the RFL drops below the lower threshold. 650
and 950-mode drivers should use different threshold level.
Reset to 0b.
7
Automatic CTS
Flow Control
Enable
RW
0b: CTS flow control is disabled (default).
1b: CTS flow control is enabled in Enhanced mode (i.e. EFR[4]
= 1), where the data transmission is prevented whenever the
CTS# pin is held inactive high. 650 and 950-mode drivers
should use different threshold level.
13-0092
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