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| 型號(hào)： | PM5352-B1 |
| 英文描述： | Interface IC |
| 中文描述： | 接口IC |
| 文件頁數(shù)： | 63/77頁 |
| 文件大?。?/td> | 901K |
| 代理商： | PM5352-B1 |
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PM5352 S/UNI STAR
DATA SHEET
PMC-1990421
ISSUE 2
SATURN USER NETWORK INTERFACE 155 (STAR)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
59
DBCTRL:
The DBCTRL bit is used to pass control of the data bus drivers to the
CSB pin. When the DBCTRL bit is set to logic one and either IOTST
or PMCTST are logic one, the CSB pin controls the output enable for
the data bus. While the DBCTRL bit is set, holding the CSB pin high
causes the S/UNI-STAR to drive the data bus and holding the CSB pin
low tri-states the data bus. The DBCTRL bit overrides the HIZDATA
bit. The DBCTRL bit is used to measure the drive capability of the
data bus driver pads.
PMCTST:
The PMCTST bit is used to configure the S/UNI-STAR for PMC's
manufacturing tests. When PMCTST is set to logic one, the
S/UNI-STAR microprocessor port becomes the test access port used
to run the PMC "canned" manufacturing test vectors. The PMCTST bit
is logically "ORed" with the IOTST bit, and can be cleared by setting
CSB to logic one or by writing logic zero to the bit.
PMCATST:
The PMCATST bit is used to configure the analog portion of the
S/UNI-STAR for PMC's manufacturing tests.
Reserved:
The reserved bit must be programmed to logic one for proper
operation.
9.2 JTAG Test Port
The S/UNI-STAR JTAG Test Access Port (TAP) allows access to the TAP
controller and the 4 TAP registers: instruction, bypass, device
identification and boundary scan. Using the TAP, device input logic levels
can be read, device outputs can be forced, the device can be identified
and the device scan path can be bypassed. For more details on the JTAG
port, please refer to the Operations section.
Table 3: Instruction Register (Length - 3 bits)
Instructions
Selected Register
Instruction Codes,
IR[2:0]
EXTEST
IDCODE
SAMPLE
Boundary Scan
Identification
Boundary Scan
000
001
010
This Material Copyrighted by Its Respective Manufacturer
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