參數(shù)資料
型號: PowerPC 750CX
廠商: IBM Microeletronics
英文描述: 32-Bit Reduced Instruction Set Computer (RISC) Microprocessors(32位精簡指令集微處理器)
中文描述: 32位精簡指令集計算機(jī)(RISC)微處理器(32位精簡指令集微處理器)
文件頁數(shù): 27/44頁
文件大?。?/td> 562K
代理商: POWERPC 750CX
PowerPC 750CX RISC Microprocessor Datasheet
November 13, 2000
Version 1.1
Page 27
TS
1
Low
I/O
TSIZ0-TSIZ2
3
High
Output
TT0-TT4
5
High
I/O
WT
1
Low
Output
BVSEL
1
High
Input
Pin set LOW = 1.8V , pin set HIGH = 2.5V
(this is supported for DD2.X)
AV
DD
1
Supply for PLL
OV
DD
24
Supply for Receiver/Drivers
V
DD
40
Supply for Core
Ground
53
Common Ground
Table 11: Signals Missing from Previous PowerPC 750 Designs
Signal Name
Pin Count
Active
I/O
Notes
ABB
1
Low
I/O
DBB
1
Low
I/O
DBDIS
1
Low
Input
RSRV
1
Low
Output
SMI
1
Low
Input
TBEN
1
High
Input
VOLTDET
1
High
Output
AP0-3
4
High
I/O
DP0-7
8
High
I/O
DRTRY
1
Low
Input
TLBISYNC
1
Low
Input
Note: Special attention should be taken to tie test signals to appropriate levels for normal machine operation.
Table 10: Signal Listing for the 256 PBGA Package (cont.)
Signal Name
Pin Count
Active
I/O
Notes
Note:
1. These are test signals for factory use only and must be pulled up to OV
DD
for normal machine operation.
2. The CKSTP_OUT signal in test mode allows viewing the PowerPC 750CX RISC Microprocessor internal clocks.
The QACK signal allows selection of 32-bit mode.(See the PowerPC 750CX RISC Microprocessor User’s Manualfor more information.)
3. L2-TSTCLK in normal mode is
DBWO
, for details, see Section 7.9.4 on Page 39.
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