PowerPC 750CX RISC Microprocessor Datasheet
Page 4
Version 1.1
November 13, 2000
List of Figures
Figure 1. PowerPC 750CX RISC Microprocessor Block Diagram .............................................. 8
Figure 2. SYSCLK Input Timing Diagram ................................................................................... 15
Figure 3. Input Timing Diagram .................................................................................................... 16
Figure 4. Mode Select Input Timing Diagram ............................................................................... 17
Figure 5. Output Valid Timing Definition ..................................................................................... 18
Figure 6. Output Timing Diagram for PowerPC 750CX RISC Microprocessor .......................... 19
Figure 7. JTAG Clock Input Timing Diagram .............................................................................. 20
Figure 8. TRST Timing Diagram .................................................................................................. 21
Figure 9. Boundary-Scan Timing Diagram ................................................................................... 21
Figure 10. Test Access Port Timing Diagram ................................................................................. 22
Figure 11. Pinout of the 256 PBGA Package as Viewed from Solder Ball side ............................. 23
Figure 12. Side Profile View of PBGA ........................................................................................... 24
Figure 13. Side Profile View Showing Exposed Cavity .................................................................. 24
Figure 14. PowerPC 750CX Microprocessor Ball Placement ......................................................... 25
Figure 15. PLL Power Supply Filter Circuit ................................................................................... 31
Figure 16. Driver Impedance Measurement .................................................................................... 32
Figure 17. IBM RISCWatch
TM
JTAG to HRESET, TRST, and SRESET Signal Connector ........ 36
Figure 18. PBGA Package with Thermal Model ............................................................................. 37
Figure 19. IBM Part Number Key ................................................................................................... 40