參數(shù)資料
型號(hào): PPC5567MVR132
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 13/68頁(yè)
文件大?。?/td> 0K
描述: MCU 32BIT POWERPC 416-PBGA
標(biāo)準(zhǔn)包裝: 200
系列: MPC55xx Qorivva
核心處理器: e200z6
芯體尺寸: 32-位
速度: 132MHz
連通性: CAN,EBI/EMI,以太網(wǎng),SCI,SPI
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 238
程序存儲(chǔ)器容量: 2MB(2M x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 80K x 8
電壓 - 電源 (Vcc/Vdd): 1.35 V ~ 1.65 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 40x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 416-BBGA
包裝: 托盤
MPC5567 Microcontroller Data Sheet, Rev. 2
Electrical Characteristics
Freescale Semiconductor
20
3.9
Oscillator and FMPLL Electrical Characteristics
Table 12. FMPLL Electrical Specifications
(VDDSYN = 3.0–3.6 V; VSS = VSSSYN = 0.0 V; TA = TL to TH)
Spec
Characteristic
Symbol
Minimum
Maximum
Unit
1
PLL reference frequency range: 1
Crystal reference (20)2
Crystal reference (40)3
External reference (20)2
External reference (40)3
Dual controller (1:1 mode)
fref_crystal
fref_ext
fref_1:1
8
> 20
8
> 20
24
20
40
20
40
fsys 2
MHz
2
System frequency 4
fsys
f
ICO
(MIN) 2
RFD
fMAX 5
MHz
3
System clock period
tCYC
—1
fsys
ns
4
Loss of reference frequency 6
fLOR
100
1000
kHz
5
Self-clocked mode (SCM) frequency 7
fSCM
7.4
17.5
MHz
6
EXTAL input high voltage crystal mode 8
All other modes
[dual controller (1:1), bypass, external reference]
VIHEXT
VXTAL + 0.4 V
(VDDE5 2) + 0.4 V
V
7
EXTAL input low voltage crystal mode 9
All other modes
[dual controller (1:1), bypass, external reference]
VILEXT
VXTAL – 0.4 V
(VDDE5 2) – 0.4 V
V
8
XTAL current 10
IXTAL
26
mA
9
Total on-chip stray capacitance on XTAL
CS_XTAL
—1.5
pF
10
Total on-chip stray capacitance on EXTAL
CS_EXTAL
—1.5
pF
11
Crystal manufacturer’s recommended capacitive
load
CL
Refer to crystal
specification
Refer to crystal
specification
pF
12
Discrete load capacitance to connect to EXTAL
CL_EXTAL
(2
CL) – CS_EXTAL
– CPCB_EXTAL 11
pF
13
Discrete load capacitance to connect to XTAL
CL_XTAL
(2
CL) – CS_XTAL
– CPCB_XTAL 11
pF
14
PLL lock time 12
tlpll
750
s
15
Dual controller (1:1) clock skew
(between CLKOUT and EXTAL) 13, 14
tskew
–2
2
ns
16
Duty cycle of reference
tDC
40
60
%
17
Frequency unLOCK range
fUL
–4.0
4.0
% fSYS
18
Frequency LOCK range
fLCK
–2.0
2.0
% fSYS
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