參數(shù)資料
型號: PPC5567MVR132
廠商: Freescale Semiconductor
文件頁數(shù): 33/68頁
文件大?。?/td> 0K
描述: MCU 32BIT POWERPC 416-PBGA
標(biāo)準(zhǔn)包裝: 200
系列: MPC55xx Qorivva
核心處理器: e200z6
芯體尺寸: 32-位
速度: 132MHz
連通性: CAN,EBI/EMI,以太網(wǎng),SCI,SPI
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 238
程序存儲器容量: 2MB(2M x 8)
程序存儲器類型: 閃存
RAM 容量: 80K x 8
電壓 - 電源 (Vcc/Vdd): 1.35 V ~ 1.65 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 40x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 416-BBGA
包裝: 托盤
Electrical Characteristics
MPC5567 Microcontroller Data Sheet, Rev. 2
Freescale
39
3.13.7
eMIOS Timing
Figure 17. eMIOS Timing
3.13.8
DSPI Timing
Table 25. eMIOS Timing 1
1 eMIOS timing specified at: VDDEH = 3.0–5.25 V and TA = TL to TH.
Spec
Characteristic
Symbol
Min.
Max.
Unit
1
eMIOS input pulse width
tMIPW
4—
tCYC
2
eMIOS output pulse width
tMOPW
1 2
2 This specification does not include the rise and fall times. When calculating the minimum eMIOS pulse width, include the rise
and fall times defined in the slew rate control field (SRC) in the pad configuration register (PCR).
—tCYC
Table 26. DSPI Timing12
Spec
Characteristic
Symbol
80 MHz
112 MHz
132 MHz
Unit
Min.
Max.
Min.
Max.
Min.
Max.
1
SCK cycle time3, 4
tSCK
24.4 ns
2.9 ms
17.5 ns
2.1 ms
14.8 ns
1.8 ms
2
PCS to SCK delay5
tCSC
23
15
13
ns
3
After SCK delay6
tASC
22
14
12
ns
4
SCK duty cycle
tSDC
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
ns
5
Slave access time
(SS active to SOUT driven)
tA
25
25
25
ns
6
Slave SOUT disable time
(SS inactive to SOUT Hi-Z, or invalid)
tDIS
25
25
25
ns
7PCSx to PCSS time
tPCSC
4—
4
4
ns
8PCSS to PCSx time
tPASC
5—
5
5
ns
1
2
eMIOS
output
eMIOS input
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