
PXB 4330
Data Sheet
13
09.99
Preface
The ATM Buffer Manager (ABM) is part of Infineon’s ATM Layer chipset consisting of
four devices that provide a complete solution of ATM Layer functionality on ATM Line
Cards for Enterprise- and Central Office Switches, DSLAMs and Access Multiplexers.
The chipset has a featureset for processing ATM Layer functionality for STM-4/OC-12
requirements in a very cost effective way. The ABM is a very powerful and feature-rich
solution for an effective ATM Traffic Management and includes buffer capacity for up to
128 K cells with a bi-directional throughput of 687 MBit/sec. The device supports CBR,
VBR-rt, VBR-nrt, ABR, UBR and UBR+ traffic.
The document provides a complete reference information on functional -, operational -,
interface - and register description as well as electrical characteristics and package
information. For application specific questions different application notes can be
provided upon request.
Organization of this Document
This Data Sheet is divided into 10 chapters and is organized as follows:
Chapter 1, Overview
Gives a general description of the product and its family, lists the key features,
includes a Logic Symbol, and presents some typical applications.
Chapter 2, Pin Descriptions
Provides detailed pin desciptions and a pin out diagram for the PXB 4330.
Chapter 3, Functional Description
Provides detailed descriptions of all major functional blocks of the device.
Chapter 4, Operational Description
Describes initialization and test, configuration and connection setup, queues and
classes, and connection types.
Chapter 5, Interface Descriptions
Begins with information about the UTOPIA Interfaces, RAM Interfaces,
Microprocessor Interface, and JTAG Test Interface, and concludes with the Clocking
concept.
Chapter 6, Register Descriptions
Provides both an overview of the ABM Register Set and detailed descriptions of the
registers.
Chapter 7,Electrical Characteristics
Gives Absolute Maximum Ratings, Operating Ranges, DC and AC Characteristics,
Timing information and diagrams for the various interfaces, Capacitances, and
Package Characteristics.
Chapter 8, Package Outlines
Includes detailed package information.
Chapter 9, References
Provides detailed bibliographic information for references cited in the document.