
PXB 4330
Overview
Data Sheet
1-22
09.99
1.4
ATM Layer Chip Set Overview
The PXB 4330 E ABM is a member of the Infineon ATM Layer chip set. The chip set
includes:
PXB 4330 E ATM Buffer Manager ABM
PXB 4340 E ATM OAM Processor AOP
PXB 4350 E ATM Layer Processor ALP
PXB 4360 F Content Addressable Memory Element CAME.
These chips form a complete chip set with which to build an ATM switch. A generic ATM
switch consists of a switching fabric and switch ports as shown in
Figure 1-4
.
Figure 1-4
ATM Switch Basic Configuration
In the Infineon ATM Layer chip set, the switching fabric is expected to perform cell rout-
ing only. All other ATM layer functions are performed on the switch ports: policing,
header translation, and cell counting by the PXB 4350 E ALP; OAM functions by the
PXB 4340 E AOP; and traffic management by the PXB 4330 E ABM. The PXB 4360 F
CAME can be used optionally as an external Address Reduction Circuit (ARC) for the
PXB 4350 E ALP.
Only two interfaces are used for data transfer: the industry standard UTOPIA [
1, 2
] Level
2 multi-PHY interfaces and the proprietary Switch Link InterFace (SLIF). SLIF is a serial,
differential, high-speed link using LVDS [
3
] levels.
For low-throughput applications, a single-board switch with 622 Mbit/s throughput can
be built with only one PXB 4350 E ALP, one PXB 4340 E AOP, and one PXB 4330 E
ABM. Such a mini-switch (
Figure 1-5
) is basically a stand alone single port switch, with-
out the switching network access which would be provided by the PXB 4325 E ASP.
PXB 4350 E
ALP
PXB 4340 E
AOP
PXB 4325 E
ASP
UTOPIA
UTOPIA
UTOPIA
UTOPIA
SLIF
ATM
switching
fabric
consisting
of
PXB 4310 E
ASM
chips
Pol.
RAM
Pointer
RAM
Conn.
RAM
Cell
RAM
PHYs
Conn.
RAM
ARC
Conn.
RAM
PXB 4330
ABM
Conn.
RAM
Conn.
RAM
Conn.
RAM
Cell
RAM
Conn. RAM = connection data RAM
Pol. RAM = policing data RAM
ARC = address reduction circuit
Cell RAM = ATM cell storage RAM
switch port
SWF