參數(shù)資料
型號： RTL8100CL
廠商： Electronic Theatre Controls, Inc.
英文描述： SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述： 單芯片快速以太網(wǎng)控制器電源管理
文件頁數(shù)： 44/73頁
文件大?。?/td> 652K
代理商： RTL8100CL
RTL8100C & RTL8100CL
Datasheet
Single-Chip Fast Ethernet Controller
36
Track ID: JATR-1076-21 Rev. 1.06
Bytes
19h
Contents
CONFIG4
Description
RTL8100C(L) Configuration register 4.
Operational registers offset 5Ah.
Reserved. Do not change this field without Realtek approval.
PHY Parameter 1-U for RTL8100C(L).
Operational registers of the RTL8100C(L) are from 78h to 7Bh.
Reserved. Do not change this field without Realtek approval.
PHY Parameter 2-U for RTL8100C(L). Operational register of the RTL8100C(L) is
80h.
Reserved. Do not change this field without Realtek approval.
Do not change this field without Realtek approval.
Bit7-3: Reserved.
Bit2: Link Down Power Saving mode.
1: Disable.
0: Enable. When the cable is disconnected (Link Down), the analog part will power
itself down (PHY Tx part and Twister) automatically except for the PHY Rx part and
part of the twister that monitors the SD signal in case the cable is reconnected and the
Link is established again.
Bit1: LANWake signal Enable/Disable.
1: Enable LANWake signal
0: Disable LANWake signal
Bit0: PME_Status bit property.
1: The PME_Status bit can be reset by PCI reset or by software if
D3cold_support_PME is 0. If D3cold_support_PME=1, the PME_Status bit is a
sticky bit
0: The PME_Status bit is always a sticky bit and can only be reset by software
Reserved. Do not change this field without Realtek approval.
Twister Parameter U for the RTL8100C(L).
Operational registers of the RTL8100C(L) are 7Ch-7Fh.
Reserved. Do not change this field without Realtek approval.
Twister Parameter T for the RTL8100C(L).
Operational registers of the RTL8100C(L) are 7Ch-7Fh.
Reserved. Do not change this field without Realtek approval.
PHY Parameter 1-T for the RTL8100C(L).
Operational registers of the RTL8100C(L) are from 78h to 7Bh.
Reserved. Do not change this field without Realtek approval.
PHY Parameter 2-T for the RTL8100C(L).
Operational register of the RTL8100C(L) is 80h.
Reserved.
Reserved. Do not change this field without Realtek approval.
Checksum of the EEPROM content.
Reserved. Do not change this field without Realtek approval.
Reserved. Do not change this field without Realtek approval.
PXE ROM code parameter.
VPD data field. Offset 40h is the start address of the VPD data.
1Ah-1Dh
PHY1_PARM_U
1Eh
PHY2_PARM_U
1Fh
CONFIG_5
20h-23h
TW_PARM_U
24h-27h
TW_PARM_T
28h-2Bh
PHY1_PARM_T
2Ch
PHY2_PARM_T
2Dh-31h
32h-33h
-
CheckSum
34h-3Eh
3Fh
-
PXE_Para
40h-7Fh
VPD_Data
相關PDF資料
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RTL8130 REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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相關代理商/技術參數(shù)
參數(shù)描述
RTL8100C-LF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8100CL-LF 制造商:Realtek Semiconductor 功能描述:RTL8100CL Series 3.6 V Fast Ethernet Controller with Power Management LQFP-128
RTL8100L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8101 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8101L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER AND MC97 CONTROLLER WITH POWER MANAGEMENT
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