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參數(shù)資料
| 型號(hào)： | RTL8139A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT |
| 中文描述： | 瑞昱單芯片快速以太網(wǎng)控制器電源管理 |
| 文件頁數(shù)： | 18/62頁 |
| 文件大?。?/td> | 648K |
| 代理商： | RTL8139A |
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RTL8139C(L)
2002/01/10
Rev.1.4
18
memory. This field sets the threshold level according to the following
table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = no rx threshold. The RTL8139C(L) begins the transfer of data
after having received a whole packet in the FIFO.
Rx Buffer Length:
This field indicates the size of the Rx ring buffer.
00 = 8k + 16 byte
01 = 16k + 16 byte
10 = 32K + 16 byte
11 = 64K + 16 byte
Max DMA Burst Size per Rx DMA Burst:
This field sets the
maximum size of the receive DMA data bursts according to the following
table:
000 = 16 bytes
001 = 32 bytes
010 = 64 bytes
011 = 128 bytes
100 = 256 bytes
101 = 512 bytes
110 = 1024 bytes
111 = unlimited
0: The RTL8139C(L) will transfer the rest of the packet data into the
beginning of the Rx buffer if this packet has not been completely
moved into the Rx buffer and the transfer has arrived at the end of
the Rx buffer.
12-11
R/W
RBLEN1, 0
10-8
R/W
MXDMA2, 1, 0
7
R/W
WRAP
1: The RTL8139C(L) will keep moving the rest of the packet data into the
memory immediately after the end of the Rx buffer, if this packet has
not been completely moved into the Rx buffer and the transfer has
arrived at the end of the Rx buffer. The software driver must reserve at
least 1.5K bytes buffer to accept the remainder of the packet. We
assume that the remainder of the packet is X bytes. The next packet will
be moved into the memory from the X byte offset at the top of the Rx
buffer.
This bit is invalid when Rx buffer is selected to 64K bytes.
EEPROM Select:
This bit reflects what type of EEPROM is used.
1: The EEPROM used is 9356.
0: The EEPROM used is 9346.
Accept Error Packets:
This bit determines if packets with CRC error,
alignment error and/or collided fragments will be accepted or rejected.
0: Reject error packets
1: Accept error packets
Accept Runt Packets:
This bit allows the receiver to accept packets
that are smaller than 64 bytes. The packet must be at least 8 bytes long to
be accepted as a runt.
0: Reject runt packets
1: Accept runt packets
Accept Broadcast Packets:
This bit allows the receiver to accept or
reject broadcast packets.
0: Reject broadcast packets
1: Accept broadcast packets
6
R
9356SEL
5
R/W
AER
4
R/W
AR
3
R/W
AB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RTL8139B | REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT |
| RTL8139D | REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT |
| RTL8201 | REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL |
| RTL8201BL | REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL |
| RTL8208 | REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RTL8139B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT |
| RTL8139C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT |
| RTL8139C_PLUS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8139C_Plus Specification |
| RTL8139CL | 制造商:Realtek Semiconductor 功能描述: |
| RTL8139CL+ | 制造商:Realtek Semiconductor 功能描述: |
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