參數(shù)資料
型號(hào)： RTL8139A
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述： 瑞昱單芯片快速以太網(wǎng)控制器電源管理
文件頁(yè)數(shù)： 34/62頁(yè)
文件大?。?/td> 648K
代理商： RTL8139A
RTL8139C(L)
2002/01/10
Rev.1.4
34
1Fh
CONFIG_5
Do not change this field without Realtek approval.
Bit7-3: Reserved.
Bit2: Link Down Power Saving mode:
Set to 1: Disable.
Set to 0: Enable. When cable is disconnected(Link Down), the analog part will power
down itself (PHY Tx part & part of twister) automatically except PHY Rx part and
part of twister to monitor SD signal in case that cable is re-connected and Link should
be established again.
Bit1: LANWake signal Enable/Disable
Set to 1: Enable LANWake signal.
Set to 0: Disable LANWake signal.
Bit0: PME_Status bit property
Set to 1: The PME_Status bit can be reset by PCI reset or by software if
D3cold_support_PME is 0. If D3cold_support_PME=1, the PME_Status bit is a
sticky bit.
Set to 0: The PME_Status bit is always a sticky bit and can only be reset by software.
20h-23h
TW_PARM_U
Reserved. Do not change this field without Realtek approval.
Twister Parameter U for RTL8139C. Operational registers of the RTL8139C(L) are
7Ch-7Fh.
Reserved. Do not change this field without Realtek approval.
Twister Parameter T for RTL8139C. Operational registers of the RTL8139C(L) are
7Ch-7Fh.
PHY1_PARM_T Reserved. Do not change this field without Realtek approval.
PHY Parameter 1-T for RTL8139C. Operational registers of the RTL8139C(L) are from
78h to 7Bh.
PHY2_PARM_T Reserved. Do not change this field without Realtek approval.
PHY Parameter 2-T for RTL8139C. Operational register of the RTL8139C(L) is 80h.
-
Reserved.
CISPointer
Reserved. Do not change this field without Realtek approval.
CIS Pointer.
CheckSum
Reserved. Do not change this field without Realtek approval.
Checksum of the EEPROM content.
-
Reserved. Do not change this field without Realtek approval.
PXE_Para
Reserved. Do not change this field without Realtek approval.
PXE ROM code parameter.
VPD_Data
VPD data field. Offset 40h is the start address of the VPD data.
CIS_Data
CIS data field. Offset 80h is the start address of the CIS data. (93C56 only).
24h-27h
TW_PARM_T
28h-2Bh
2Ch
2Dh-2Fh
30h-31h
32h-33h
34h-3Eh
3Fh
40h-7Fh
80h-FFh
相關(guān)PDF資料
PDF描述
RTL8139B REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139D REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8201 REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL
RTL8201BL REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL
RTL8208 REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RTL8139B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C_PLUS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8139C_Plus Specification
RTL8139CL 制造商:Realtek Semiconductor 功能描述:
RTL8139CL+ 制造商:Realtek Semiconductor 功能描述:
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