參數(shù)資料
型號: RTL8139A
廠商: Electronic Theatre Controls, Inc.
英文描述: REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
中文描述: 瑞昱單芯片快速以太網(wǎng)控制器電源管理
文件頁數(shù): 8/62頁
文件大?。?/td> 648K
代理商: RTL8139A
RTL8139C(L)
2002/01/10
Rev.1.4
8
PERRB
S/T/S
21
Parity Error:
When the RTL8139C(L) is the bus master and a parity
error is detected, the RTL8139C(L) asserts both SERR bit in ISR and
Configuration Space command bit 8 (SERRB enable). Next, it
completes the current data burst transaction, then stops operation and
resets itself. After the host clears the system error, the RTL8139C(L)
continues its operation.
When the RTL8139C(L) is the bus target and a parity error is detected,
the RTL8139C(L) asserts this PERRB pin low.
System Error:
If an address parity error is detected and Configuration
Space Status register bit 15 (detected parity error) is enabled,
RTL8139C(L) asserts both SERRB pin low and bit 14 of Status register
in Configuration Space.
Stop:
Indicates the current target is requesting the master to stop the
current transaction.
Reset:
When RSTB is asserted low, the RTL8139C(L) performs an
internal system hardware reset. RSTB must be held for a minimum of
120 ns.
SERRB
O/D
22
STOPB
S/T/S
20
RSTB
I
115
5.3 FLASH/EEPROM Interface
Symbol
MA16-3
MA8
Type
O
I/O
Pin No
Description
70-63, 61, 60, 57,
53-51
61
Boot PROM Address Bus:
These pins are used to access up to a
128k-byte flash memory or EPROM.
Output pin as part of Boot PROM (or Flash) address bus after PCI reset.
Input pin as Aux. Power detect pin to detect if Aux. Power exists or not,
when initial power-on or PCI reset is asserted. Besides connecting this
pin to Boot PROM, it should be pulled high to the Aux. Power via a
resistor to detect Aux. power. If this pin is not pulled high to Aux.
Power, the RTL8139C(L) assumes that no Aux. power exists. To
support wakeup from ACPI D3cold or APM power-down, this pin must
be pulled high to Aux. power via a resistor.
When this pin is pulled high with a 10K
resistor, the 93C56 EEPROM
is used to store the resource data and CIS for the RTL8139C(L). The
RTL8139C(L) latches the status of this pin at power-up to determine
what EEPROM (93C46 or 93C56) is used, afterwards, this pin is used
as MA6.
The MA2-0 pins are switched to EESK, EEDI, EEDO in 93C46
(93C56) programming or auto-load mode.
93C46 (93C56) chip select
Boot PROM data bus
ROM Chip Select:
This is the chip select signal of the Boot PROM.
Output Enable:
This enables the output buffer of the Boot PROM or
Flash memory during a read operation.
Write Enable:
This signal strobes data into the Flash memory during a
write cycle.
MA6/9356SEL
I/O
57
MA2/EESK
O
49
MA1/EEDI
MA0/EEDO
EECS
MD0-7
ROMCSB
OEB
O
O, I
O
I/O
O
O
48
47
50
108, 107, 105-100
110
88
WEB
O
89
相關(guān)PDF資料
PDF描述
RTL8139B REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RTL8139B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REALTEK SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT
RTL8139C_PLUS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RTL8139C_Plus Specification
RTL8139CL 制造商:Realtek Semiconductor 功能描述:
RTL8139CL+ 制造商:Realtek Semiconductor 功能描述: