參數(shù)資料
型號: S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 146/161頁
文件大小: 1037K
代理商: S1C621A0F0A0100
I-60
EPSON
S1C621A0 TECHNICAL HARDWARE
CHAPTER 3: PERIPHERAL CIRCUITS (Initial Reset)
Reset at power-on
At power-on, the initial reset signal has two functions. One
function is to initialize a circuit and the other to sustain the
initializing function until the OSC3 oscillation is stabilized.
Thus, the RESET input must be held at low level for at least
0.5 second after power-on.
After the RESET input reaches the high level and the OSC1
oscillation circuit starts operating, several milliseconds later,
the system is released from internal reset and starts to
operate.
Fig. 3.12.2
Initial Reset Sequence at
Power-on
VDD
OSC1
RESET
Detect oscillation
Watchdog timer
Internal initial reset
(Vss : GND)
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