參數(shù)資料
型號(hào): S1C621A0F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 48/161頁
文件大小: 1037K
代理商: S1C621A0F0A0100
142
32000D–04/2011
AVR32
BLD – Bit load from register to C and Z
Architecture revision:
Architecture revision1 and higher.
Description
Copy an arbitrary bit in a register to C and Z.
Operation:
I.
C
← Rd[bp5];
Z
← Rd[bp5];
Syntax:
I.
bld
Rd, bp
Operands:
I.
d
∈{0, 1, …, 15}
bp
∈ {0, 1, …, 31}
Status Flags
Q:
Not affected.
V:
Not affected.
N:
Not affected.
Z:
Z
Rd[bp5]
C:
C
Rd[bp5]
Opcode:
111011011011
Rd
31
29
28
25
24
20
19
16
00000000000
Bit Position
15
5
4
0
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