參數資料
型號： S71GL064A08BAW0F3
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA56
封裝： 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁數： 88/134頁
文件大?。?/td> 2383K
代理商： S71GL064A08BAW0F3
February 8, 2005 S71GL064A_00_A2
S71GL064A based MCPs
55
Advance
Informatio n
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress
or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may
be read at any address, and is valid after the rising edge of the final WE# pulse in the com-
mand sequence (prior to the program or erase operation), and during the sector erase time-
out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any ad-
dress cause DQ6 to toggle. The system may use either OE# or CE# to control the read cycles.
When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected,
DQ6 toggles for approximately 100 s, then returns to reading array data. If not all selected
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ig-
nores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing
or is erase-suspended. When the device is actively erasing (that is, the Embedded Erase al-
gorithm is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6
stops toggling. However, the system must also use DQ2 to determine which sectors are eras-
ing or erase-suspended. Alternatively, the system can use DQ7 (see the subsection on DQ7:
Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after
the program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Em-
bedded Program algorithm is complete.
Table 11 shows the outputs for Toggle Bit I on DQ6. Figure 8 shows the toggle bit algorithm.
Figure 20 in the “AC Characteristics” section shows the toggle bit timing diagrams. Figure 21
shows the differences between DQ2 and DQ6 in graphical form. See also the subsection on
DQ2: Toggle Bit II.
相關PDF資料
PDF描述
S71GL064A08BFI0B2 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B2 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
相關代理商/技術參數
參數描述
S71GL064A08BFI0B0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0B2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0B3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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