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參數(shù)資料
| 型號(hào)： | SAA2502 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ISO/MPEG Audio Source Decoder |
| 中文描述： | 的ISO / MPEG音頻信源解碼器 |
| 文件頁數(shù)： | 12/64頁 |
| 文件大小： | 318K |
| 代理商： | SAA2502 |
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1997 Nov 17
12
Philips Semiconductors
Preliminary specification
ISO/MPEG Audio Source Decoder
SAA2502
7.3.1
M
ASTER INPUT MODE
Master input mode is the default mode of operation. This
mode may also be enforced by setting the INMOD control
flags to 00. Which means that the SAA2502 will generate
requests for input data at regular intervals. CDVAL is not
used in this mode (it should be connected to V
SS
or V
DD
).
CDVAL is implicitly assumed to be logic 1 during the 2nd
up to (and including) the 17th bit slot after a rising or a
falling edge of CDRQ (see Fig.7). Thus signal CD should
carry the coded data in bursts of 16 valid bits.
In this mode the CDRQ frequency is locked to (i.e. derived
from) the 256
×
f
s
clock. Its average value equals the bit
rate divided by 32.
The bit clock CDCL is output, its frequency is fixed:
when MCLK24 = logic 1
when MCLK24 = logic 0.
32
MCLK
16
MCLK
MPEG free format bit rate is NOT allowed in this mode.
Assume N is the number of CDCL periods between two
transitions of CDRQ, and R is the number of CDCL periods
to obtain the effective bit rate E (in kbits/s) at a CDCL
frequency of 768 kHz, i.e.
.
The SAA2502 keeps the average value of N exactly at R,
but individual values of N may vary between
N = round (R)
2 and N = round (R) +2.
7.3.2
S
LAVE INPUT MODE
Slave input mode is activated by setting the INMOD control
flags to 0 1. Which means that the SAA2502 will accept
input data as presented by the application. In this mode it
is the responsibility of the application to maintain locking
between the 256
×
f
s
sample clock and the average bit
rate.
R
16
768
E
×
=
Fig.7 Master mode input data format.
handbook, full pagewidth
CDCL
MGE474
CD
CDEF
CDRQ
CDSY
unreliable data bit (example)
start of byte or frame
1
1
2
2
14
valid data
valid but unreliable data
invalid data
15
16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2502H | ISO/MPEG Audio Source Decoder |
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
| SAA2503HT | MPEG2 audio decoder |
| SAA2505H-M1 | Digital multi-channel audio IC DUET |
| SAA2505 | Digital multi-channel audio IC DUET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2502H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
| SAA2503 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2503HT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2505 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
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