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參數(shù)資料
| 型號： | SAA2502 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ISO/MPEG Audio Source Decoder |
| 中文描述： | 的ISO / MPEG音頻信源解碼器 |
| 文件頁數(shù)： | 23/64頁 |
| 文件大小： | 318K |
| 代理商： | SAA2502 |
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1997 Nov 17
23
Philips Semiconductors
Preliminary specification
ISO/MPEG Audio Source Decoder
SAA2502
7.4.9.2
Buffer controlled input mode
Input buffer latency time behaviour is relatively complex in
this mode.
At start-up (i.e. during the search-for-frame sync) latency
time is very small (t
buf
< 2 ms) because the input buffer
remains empty.
After a frame sync is detected, normal decoding starts and
the buffer fills up to its desired fill level. That level will result
in a buffer latency time t
buf2
(see Tables 11 and 12, t
buf1
plays no role) for constant bit rate operation.
It is more complex for variable bit rates, at high bit rates the
buffer will hold only a fraction of a frame, while at low bit
rates it may hold many frames (each possibly of a different
bit rate). Also input buffer content may deviate from the
desired level because data consumption rate at the output
of the buffer may be high during short periods while
replenishing is limited by CDCL frequency.
As a result buffer latency time in buffer controlled input
mode may be predicted more or less accurately only at
(re)start time.
Another consequence of buffer behaviour at very low bit
rates in this mode is that buffer latency time values may
become large. Therefore it might be possible that the
SAA2502 will request data, which is not (yet) available.
In those situations the SAA2502 is requesting more data
than required; storage of more than one complete frame in
the input buffer is never necessary.
Consequently the application may delay delivery of
requested data until it becomes available without any
effect on correct SAA2502 operation. This option
constitutes delayed delivery possibility.
7.5
Output interface module
The output interface module produces stereo baseband
output samples in three different formats at the same time:
I
2
S
SPDIF
256 times oversampled bit serial analog.
Any of the three outputs may be enabled or disabled in
order to save dissipation and minimize EMC generation in
applications that do not need all of them.
Decoded mono streams and the (user) selected channel of
dual channel streams are presented at both (left and right)
output channels.
If indicated in the coded input data, de-emphasis filtering
is performed digitally on the output data, thus avoiding the
need of external analog de-emphasis filter circuitry.
7.5.1
I
2
S
OUTPUT
This output interface section generates decoded
baseband audio data in I
2
S format (see Fig.15).
The I
2
S output interface section consists of 3 signals
(see Table 13).
Fig.15 I
2
S output serial data transfer format.
handbook, full pagewidth
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valid data
MGB502
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2502H | ISO/MPEG Audio Source Decoder |
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
| SAA2503HT | MPEG2 audio decoder |
| SAA2505H-M1 | Digital multi-channel audio IC DUET |
| SAA2505 | Digital multi-channel audio IC DUET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2502H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
| SAA2503 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2503HT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2505 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
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