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| 型號(hào)： | SAH-C515A-4R |
| 廠(chǎng)商： | INFINEON TECHNOLOGIES AG |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | METRIC, PLASTIC, QFP-80 |
| 文件頁(yè)數(shù)： | 178/182頁(yè) |
| 文件大小： | 1917K |
| 代理商： | SAH-C515A-4R |
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Semiconductor Group
6-44
1997-08-01
On-Chip Peripheral Components
C515A
6.3.3
Baud Rate Generation
There are several possibilities to generate the baud rate clock for the serial port depending on the
mode in which it is operating.
For clarification some terms regarding the difference between "baud rate clock" and "baud rate"
should be mentioned. The serial interface requires a clock rate which is 16 times the baud rate for
internal synchronization. Therefore, the baud rate generators have to provide a "baud rate clock" to
the serial interface which - there divided by 16 - results in the actual "baud rate". However, all
formulas given in the following section already include the factor and calculate the final baud rate.
Further, the abrevation fOSC refers to the external clock frequency (oscillator or external input clock
operation).
The baud rate of the serial port is controlled by two bits which are located in the special function
registers as shown below.
Special Function Register ADCON0 (Address D8H)
Reset Value : 00H
Special Function Register PCON (Address 87H)
Reset Value : 00H
Figure 6-23 shows the configuration for the baud rate generation of the serial port.
Bit
Function
BD
Baud rate generator enable
When set, the baud rate of the serial interface is derived from the dedicated
programmable baud rate generator. When cleared (default after reset), baud rate
is derived from the timer 1 overflow rate.
SMOD
Double baud rate
When set, the baud rate of serial interface 0 in modes 1, 2, 3 is doubled. After
reset this bit is cleared.
SMOD
PDS
IDLS
SD
87H
PCON
Bit No.
MSB
LSB
GF1
GF0
PDE
IDLE
76543210
The shaded bits are not used in controlling the serial port baud rate
.
BD
CLK
ADEX
BSY
D8H
ADCON0
ADM
MX2
MX1
MX0
DFH
DEH
DDH
DCH
DBH
DAH
D9H
D8H
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