- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98076 > SAH-C515A-4R (INFINEON TECHNOLOGIES AG) 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 PDF資料下載
參數(shù)資料
| 型號： | SAH-C515A-4R |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | METRIC, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 7/182頁 |
| 文件大?。?/td> | 1917K |
| 代理商： | SAH-C515A-4R |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁
Semiconductor Group
6-53
1997-08-01
On-Chip Peripheral Components
C515A
6.3.5
Details about Mode 1
Ten bits are transmitted (through TXD), or received (through RXD): a start bit (0), 8 data bits (LSB
first), and a stop bit (1). On receive, the stop bit goes into RB8 in SCON. The baud rate is
determined either by the timer 1 overflow rate or by the internal baud rate generator.
Figure 6-27 shows a simplified functional diagram of the serial port in mode 1. The associated
timings for transmit/receive are illustrated in figure 6-28.
Transmission is initiated by an instruction that uses SBUF as a destination register. The "Write-to-
SBUF" signal also loads a 1 into the 9th bit position of the transmit shift register and flags the TX
control unit that a transmission is requested. Transmission starts at the next rollover in the divide-
by-16 counter. (Thus, the bit times are synchronized to the divide-by-16 counter, not to the "Write-
to-SBUF" signal).
The transmission begins with activation of SEND, which puts the start bit at TXD. One bit time later,
DATA is activated, which enables the output bit of the transmit shift register to TXD. The first shift
pulse occurs one bit time after that.
As data bits shift out to the right, zeroes are clocked in from the left. When the MSB of the data byte
is at the output position of the shift register, then the 1 that was initially loaded into the 9th position
is just to the left of the MSB, and all positions to the left of that contain zeroes. This condition flags
the TX control unit to do one last shift and then deactivate SEND and set TI. This occurs at the 10th
divide-by-16 rollover after "Write-to-SBUF".
Reception is initiated by a detected 1-to-0 transition at RXD. For this purpose RXD is sampled at a
rate of 16 times whatever baud rate has been established. When a transition is detected, the divide-
by-16 counter is immediately reset, and 1FFH is written into the input shift register, and reception
of the rest of the frame will proceed.
The 16 states of the counter divide each bit time into 16ths. At the 7th, 8th and 9th counter states
of each bit time, the bit detector samples the value of RXD. The value accepted is the value that
was seen in at latest 2 of the 3 samples. This is done for the noise rejection. If the value accepted
during the first bit time is not 0, the receive circuits are reset and the unit goes back to looking for
another 1-to-0 transition. This is to provide rejection or false start bits. If the start bit proves valid, it
is shifted into the input shift register, and reception of the rest of the frame will proceed.
As data bits come in from the right, 1s shift out to the left. When the start bit arrives at the leftmost
position in the shift register, (which in mode 1 is a 9-bit register), it flags the RX control block to do
one last shift, load SBUF and RB8, and set RI. The signal to load SBUF and RB8, and to set RI, will
be generated if, and only if, the following conditions are met at the time the final shift pulse is
generated.
1) RI = 0,
and
2) either SM2 = 0, or the received stop bit = 1
If one of these two condtions is not met the received frame is irretrievably lost. If both conditions are
met, the stop bit goes into RB8, the 8 data bit goes into SBUF, and RI is activated. At this time,
whether the above conditions are met or not, the unit goes back to looking for a 1-to-0 transition in
RXD.
相關PDF資料 |
PDF描述 |
|---|---|
| SAH-C515C-LM | 8-BIT, 10 MHz, MICROCONTROLLER, PQFP80 |
| SAH-XC2210U-8F66R | 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PDSO38 |
| SAH-XC2387A-104F80L | 16-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144 |
| SAH-XC2387C-200F100L | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
| SAH-XC2387C-136F100L | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SAH-C517A | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-bit CMOS MICROCONTROLLER |
| SAHC684M50R501 | 制造商:SHARMA 制造商全稱:Sharma Electro Components,Inc 功能描述:Tantalum Capacitors |
| SAHC685M20R501 | 制造商:SHARMA 制造商全稱:Sharma Electro Components,Inc 功能描述:Tantalum Capacitors |
| SAHD106M25R501 | 制造商:SHARMA 制造商全稱:Sharma Electro Components,Inc 功能描述:Tantalum Capacitors |
| SAHD155M50R501 | 制造商:SHARMA 制造商全稱:Sharma Electro Components,Inc 功能描述:Tantalum Capacitors |
發(fā)布緊急采購，3分鐘左右您將得到回復。