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參數(shù)資料
| 型號： | SCM69C233 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 4K x 64 Content Addressable Memory(4K x 64內(nèi)容可尋址存儲器) |
| 中文描述： | 4K的× 64內(nèi)容可尋址存儲器（4K的× 64內(nèi)容可尋址存儲器） |
| 文件頁數(shù)： | 6/22頁 |
| 文件大?。?/td> | 167K |
| 代理商： | SCM69C233 |
MCM69C233
SCM69C233
6
MOTOROLA FAST SRAM
MATCH PORT TIMINGS
(Voltages Referenced to VSS = 0 V, Max’s are tKHKH Dependent and Listed Values are for tKHKH = 15 ns)
Parameter
Symbol
Min
Max
Unit
Clock Cycle Time
tKHKH
15
250
ns
Clock High Time
tKHKL
6
244
ns
Clock Low Time
tKLKH
6
244
ns
Clock High to LHSM or LL Low
tLLKH
3
—
ns
Clock High to LHSM or LL High
tKHLH
1
—
ns
MQ Input Data Setup Time to Clock High
tMQVKH
8
—
ns
Clock High to Match Data Hold Time
tKHMQX
2
—
ns
Clock High to MQ Valid
tKHMQV
—
15
ns
Clock High to MC High
tKHMCH
—
10
ns
Clock High to MC Low
tKHMCL
—
7
ns
Clock High to MS Low
tKHMSL
—
12
ns
Clock High to MS High
tKHMSH
—
12
ns
Clock High to VPC Low
tKHVPL
—
15
ns
Clock High to VPC High
tKHVPH
—
12
ns
G Low to MQ Active
tGLMQX
3.8
—
ns
G High to MQ High–Z
tGHMQZ
—
7
ns
LH/SM Low to LH/SM Low
tSMSM
18
—
cycles
Figure 1. AC Test Loads
OUTPUT
Z0 = 50
RL = 50
VL = 1.5 V
Figure 2. Pullup for Open Drain Outputs
MCM69C233 OUTPUT PIN
3.3 V
FANOUT TO LOAD DEVICES
RH
NOTES:
1. For IRQ, DTACK, MS, MC, and VPC; RH = 200
.
2. If multiple MCM69C233s are used, RH should be placed as
close to the load devices as possible.
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