參數(shù)資料
型號(hào)： SN54ABT8996FK
廠商： Texas Instruments, Inc.
英文描述： 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
中文描述： 10位可尋址掃描港口多點(diǎn)尋址IEEE標(biāo)準(zhǔn)1149.1的JTAG技術(shù)咨詢收發(fā)器
文件頁(yè)數(shù)： 13/40頁(yè)
文件大?。?/td> 564K
代理商： SN54ABT8996FK
SN54ABT8996, SN74ABT8996
10-BIT ADDRESSABLE SCAN PORTS
MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SCBS489C – AUGUST 1994 – REVISED APRIL 1999
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
test synchronization address
The test synchronization address (TSA) is one of the three internally dedicated addresses that are recognized
globally. When an ASP receives the TSA while its secondary TAP state is Pause-DR or Pause-IR, it immediately
responds by assuming the MULTICAST status (in which PTDI and PTMS are connected to STDO and STMS
respectively, while PTDO is high impedance). No acknowledge protocol is sent. The TSA is valid only when the
TAP state of both primary and secondary is Pause-DR or Pause-IR. If the TSA is received when the TAP state
of either primary or secondary is Test-Logic-Reset or Run-Test-Idle, the shadow-protocol result is considered
to be DISCONNECT. Figures 14 and 15 show the shadow-protocol timing for TEST SYNCHRONIZATION result
when the prior ASP connect status is ON and OFF, respectively.
The TSA allows simultaneous operation of the scan chains of all selected ASPs, either for global TAP-state
movement or for scan input of common serial test data via PTDI. This is especially useful in the former case,
to simultaneously move such scan chains into the Run-Test/Idle state in which module-level or
module-to-module BIST operations can operate synchronous to TCK in that TAP state, and in the later case,
to scan common test setup/data into multiple like modules.
protocol bypass
Protocol bypass is selected by a low BYP input. This protocol-bypass mode forces the ASP into BYP status
(primary TAP signals are connected to secondary TAP signals) regardless of previous shadow-protocol results.
The CON output is made active (low). Receipt of shadow protocols is disabled.
When BYP is taken low, the primary TAP serial data signals (PTDI, PTDO) are immediately (asynchronously
to PTCK) connected to their respective secondary TAP signals (STDO, STDI). The primary TAP mode-select
signal (PTMS) is also connected to its respective secondary TAP signal (STMS) unless PTRST is low, in which
case STMS remains high until PTRST is released. Also, the shadow-protocol-receive block is reset to its
power-up state and is held in this state such that select protocols appearing at the primary TAP are ignored.
When the BYP input is released (taken high), the ASP immediately (asynchronously to PTCK) resumes the
connect status selected by the last valid shadow protocol. The shadow-protocol-receive block is again enabled
to respond to select protocols.
Figures 19 and 20 show protocol-bypass timing when the ASP connect status before BYP active is ON and OFF,
respectively.
asynchronous reset
While the PTRST input is always buffered directly to the STRST output, it also serves as an asynchronous reset
for the ASP. Given that BYP is high, when PTRST goes low, the ASP immediately assumes TRST status in which
CON is high and PTDO and STDO are at high impedance. Otherwise, if BYP is low, the ASP assumes
BYP/TRST status. In either case, STMS is set high so that connected IEEE Std 1149.1-compliant devices can
be synchronously driven to their Test-Logic-Reset states. While PTRST is low, receipt of shadow protocols
is disabled.
Figures 21 and 22 show asynchronous reset timing when the ASP connect status before PTRST active is ON
and OFF, respectively. Figure 23 shows asynchronous reset timing when BYP is low.
connect indicator
The CON output indicates secondary-scan-port activity (STDO, STMS active) regardless of whether such
activity is achieved via protocol bypass or shadow protocol. If the BYP input is low, the CON output is low.
Otherwise, if the BYP input is high, the CON output is low if the result of the last valid shadow protocol is MATCH
or TEST SYNCHRONIZATION. In all other cases, and while acknowledge protocol is in progress, the CON
output is high.
相關(guān)PDF資料
PDF描述
SN54ABT8996JT 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
SN54ABTE16246 11-Bit Incident-Wave Switching Bus Transceivers(11位入射波開(kāi)關(guān)總線收發(fā)器(三態(tài),開(kāi)路集電極輸出))
SN54ABTH162245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABTH162245DGG 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABTH162245DGV 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN54ABT8996JT 制造商:Texas Instruments 功能描述:ADDRESSABLE SCAN PORT 24CDIP - Rail/Tube
SN54ABTE16245 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN54ABTE16245_06 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN54ABTE16245WD 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN54ABTE16246 制造商:TI 制造商全稱:Texas Instruments 功能描述:11-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*