參數(shù)資料
型號(hào): ST6228CN1
廠商: 意法半導(dǎo)體
英文描述: ER 3C 3#16S SKT RECP WALL
中文描述: 8位單片機(jī)與微控制器/ D轉(zhuǎn)換器,自動(dòng)重加載定時(shí)器,UART的秘書長辦公室,安全復(fù)位和28引腳封裝
文件頁數(shù): 26/84頁
文件大小: 561K
代理商: ST6228CN1
26/84
26
ST62T28C/E28C
DIGITAL WATCHDOG
(Cont’d)
These instructions test the C bit and Reset the
MCU (i.e. disable the Watchdog) if the bit is set
(i.e. if the Watchdog is active), thus disabling the
Watchdog.
In all modes, a minimum of 28 instructions are ex-
ecuted after activation, before the Watchdog can
generate a Reset. Consequently, user software
should load the watchdog counter within the first
27 instructions following Watchdog activation
(software mode), or within the first 27 instructions
executed following a Reset (hardware activation).
It shouldbe noted that when the GEN bit islow (in-
terrupts disabled), the NMI interrupt is active but
cannot cause a wake up fromSTOP/WAIT modes.
Figure 18. A typical circuit making use of the
EXERNAL STOP MODE CONTROL feature
Figure 19. Digital Watchdog Block Diagram
NMI
SWITCH
I/O
VR02002
RSFF
8
DATA BUS
VA00010
-2
-12
OSCILLATOR
CLOCK
RESET
WRITE
RESET
DB0
R
S
Q
DB1.7
SET
LOAD
7
8
-2
SET
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