參數(shù)資料
型號(hào)： T48C862x-Rf-TNS
廠商： Atmel Corp.
元件分類(lèi)： 4位微控制器
英文描述： Microcontroller with UHF ASK/FSK Transmitter
中文描述： 微控制器，帶有超高頻ASK / FSK發(fā)射器
文件頁(yè)數(shù)： 52/108頁(yè)
文件大?。?/td> 1023K
代理商： T48C862X-RF-TNS
52
T48C862-R4 [Preliminary]
4551C–4BMCU–01/04
Timer 2 Mode Register 2
(T2M2)
Address: "7"hex - Subaddress: "2"hex
Table 19.
Timer 2 Output Select Bits
Output Mode
T2OS2
If one of these output modes is used the T2O alternate function of Port 4 must also be
activated.
Timer 2 Compare and
Compare Mode Registers
Timer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2 for
the 8-bit stage of Timer 2. The timer compares the contents of the compare register cur-
rent counter value and if it matches it generates an output signal. Dependent on the
timer mode, this signal is used to generate a timer interrupt, to toggle the output flip-flop
as SSI clock or as a clock for the next counter stage.
In the 12-bit timer mode, T2CO1 contains bits 0 to 3 and T2CO2 bits 4 to 11 of the 12-bit
compare value. In all other modes, the two compare registers work independently as a
4- and 8-bit compare register.
When assigned to the compare register a compare event will be suppressed.
Bit 3
Bit 2
Bit 1
Bit 0
T2TOP
T2OS2
T2OS1
T2OS0
Reset value: 1111b
T2TOP
T
imer
2
T
oggle
O
utput
P
reset
This bit allows the programmer to preset the Timer 2 output T2O.
T2TOP = 0, resets the toggle outputs with the write cycle (M2 = 0)
T2TOP = 1, sets toggle outputs with the write cycle (M2 = 1)
Note: If T2R = 1, no output preset is possible
T2OS2
T
imer
2
O
utput
S
elect bit
2
T2OS1
T
imer
2
O
utput
S
elect bit
1
T2OS0
T
imer
2
O
utput
S
elect bit
0
T2OS1
T2OS0
Clock Output (POUT)
Toggle mode: a Timer 2 compare match
toggles the output flip-flop (M2) -> T2O
Duty cycle burst generator 1: the DCG output
signal (DCG0) is given to the output and
gated by the output flip-flop (M2)
Duty cycle burst generator 2: the DCG output
signal (DCGO) is given to the output and
gated by the SSI internal data output (SO)
Biphase modulator: Timer 2 modulates the
SSI internal data output (SO) to Biphase
code
Manchester modulator: Timer 2 modulates
the SSI internal data output (SO) to
Manchester code
SSI output: T2O is used directly as SSI
internal data output (SO)
PWM mode: an 8/12-bit PWM mode
Not allowed
1
1
1
1
2
1
1
0
3
1
0
1
4
1
0
0
5
0
1
1
6
0
1
0
7
8
0
0
0
0
1
0
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