參數(shù)資料
型號(hào)： T48C862x-Rf-TNS
廠商： Atmel Corp.
元件分類(lèi)： 4位微控制器
英文描述： Microcontroller with UHF ASK/FSK Transmitter
中文描述： 微控制器，帶有超高頻ASK / FSK發(fā)射器
文件頁(yè)數(shù)： 74/108頁(yè)
文件大?。?/td> 1023K
代理商： T48C862X-RF-TNS
74
T48C862-R4 [Preliminary]
4551C–4BMCU–01/04
SSI Interrupt
The SSI interrupt INT3 can be generated either by an SSI buffer register status (i.e.,
transmit buffer empty or receive buffer full), the end of SSI data telegram or on the fall-
ing edge of the SC/SD pins on Port 4 (see “Port 4 Control Register (P4CR) Byte Write”
on page 38). SSI interrupt selection is performed by the Interrupt FunctioN control bit
(IFN). The SSI interrupt is usually used to synchronize the software control of the SSI
and inform the controller of the present SSI status. The Port 4 interrupts can be used
together with the SSI or, if the SSI itself is not required, as additional external interrupt
sources. In either case this interrupt is capable of waking the controller out of sleep
mode.
To enable and select the SSI relevant interrupts use the SSI interrupt mask (SIM) and
the Interrupt Function (IFN) while the Port 4 interrupts are enabled by setting appropri-
ate control bits in P4CR register.
Modulation and Demodulation
If the shift register is used together with Timer 2 or Timer 3 for modulation or demodula-
tion purposes, the 8-bit synchronous mode must be used. In this case, the unused Port
4 pins can be used as conventional bi-directional ports.
The modulation and demodulation stages, if enabled, operate as soon as the SSI is acti-
vated (SIR = 0) and cease when deactivated (SIR = 1).
Due to the byte-orientated data control, the SSI (when running normally) generates
serial bit streams which are submultiples of 8 bits. An SSI output masking (OMSK) func-
tion permits; however, the generation of bit streams of any length. The OMSK signal is
derived indirectly from the 4-bit prescaler of the Timer 2 and masks out a programmable
number of unrequired trailing data bits during the shifting out of the final data word in the
bit stream. The number of non-masked data bits is defined by the value pre-pro-
grammed in the prescaler compare register. To use output masking, the modulator stop
mode bit (MSM) must be set to "0" before programming the final data word into the SSI
transmit buffer. This in turn, enables shift clocks to the prescaler when this final word is
shifted out. On reaching the compare value, the prescaler triggers the OMSK signal and
all following data bits are blanked.
Figure 72.
SSI Output Masking Function
8-bit shift register
MSB
LSB
Shift_CL
SO
Control
SI
Timer 2
Output
SSI-control
SO
Compare 2/1
4-bit counter 2/1
CL2/1
SCL
CM1
OMSK
SC
TOG2
POUT
T1OUT
SYSCL
/2
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