![](http://datasheet.mmic.net.cn/90000/MQ83C154DXXX-12-883R_datasheet_2377128/MQ83C154DXXX-12-883R_162.png)
162
2588F–AVR–06/2013
ATtiny261/461/861
15.13.5
DIDR0 – Digital Input Disable Register 0
Bits 7:4,2:0 – ADC6D:ADC0D: ADC6:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7:0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit 3 – AREFD: AREF Digital Input Disable
When this bit is written logic one, the digital input buffer on the AREF pin is disabled. The corre-
sponding PIN register bit will always read as zero when this bit is set. When an analog signal is
applied to the AREF pin and the digital input from this pin is not needed, this bit should be written
logic one to reduce power consumption in the digital input buffer.
15.13.6
DIDR1 – Digital Input Disable Register 1
Bits 7:4 – ADC10D:ADC7D: ADC10:7 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC10:7 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
1
0
1
Timer/Counter0 Compare Match B
1
0
Timer/Counter1 Overflow
1
Watchdog Interrupt Request
Table 15-6.
ADC Auto Trigger Source Selections
ADTS2
ADTS1
ADTS0
Trigger Source
Bit
7654
3
2
10
ADC6D
ADC5D
ADC4D
ADC3D
AREFD
ADC2D
ADC1D
ADC0D
DIDR0
Read/Write
R/W
Initial Value
0000
0
00
Bit
7
65
432
10
ADC10D
ADC9D
ADC8D
ADC7D
-
DIDR1
Read/Write
R/WR/W
R
Initial Value
0