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參數資料
| 型號： | TLV320AIC13I |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
| 封裝： | PLASTIC, SOP-30 |
| 文件頁數： | 11/55頁 |
| 文件大小： | 455K |
| 代理商： | TLV320AIC13I |
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3–6
3.5.2.2 Hardware Power-Down
The TLV320AIC13 requires the PWRDN signal to be synchronized with MCLK. When PWRDN is held low, the device
enters hardware power-down mode. In this state, the internal clock control circuit and the differential outputs are
disabled. All other digital I/Os are disabled and DIN can not accept any data input. The device can only be returned
to normal operation by holding PWRDN high. When not holding the device in the hardware power-down mode,
PWRDN must be tied high.
3.6
Digital Interface
3.6.1
Clock Source (MCLK, SCLK)
MCLK is the external master clock input. The clock circuit generates and distributes necessary clocks throughout the
device. SCLK is the bit clock used to receive and transmit data synchronously. When the device is in the master mode,
SCLK and FS are output and derived from MCLK in order to provide clocking the serial communications between the
device and a digital signal processor (DSP). When in the slave mode, SCLK and FS are inputs. In the non-turbo mode
(TURBO = 0), SCLK frequency is defined by:
SCLK = (16
× FS × #Devices × mode)
Where:
FS is the frame-sync frequency.
#Device is the number of the device in cascade.
Mode is equal to 1 for continuous data transfer mode and 2 for programming mode.
In turbo mode, see Section 3.8.3.
3.6.2
Serial Data Out (DOUT)
DOUT is placed in the high-impedance state after transmission of the LSB is completed. In data frame, the data word
is the ADC conversion result. In the control frame, the data is the register read results when requested by the
read/write (R/W) bit. If a register read is not requested, the low eight bits of the secondary word are all zeroes. Valid
data on DOUT is taken from the high-impedance state by the falling edge of frame-sync (FS). The first bit transmitted
on the falling edge of FS is the MSB of valid data.
3.6.3
Serial Data In (DIN)
The data format of DIN is the same as that of DOUT, in which MSB is received first on the falling edge of FS. In a data
frame, the data word is the input digital signal to the DAC channel. If (15+1)-bit data format is used, the LSB (D0) is
set to 1 to switch from the continuous data transfer mode to the programming mode. In a control frame, the data is
the control and configuration data that sets the device for a particular function as described in Section 3.9, Control
Register Programming.
3.6.4
Frame-Sync FS
The frame-sync signal (FS) indicates the device is ready to send and receive data. FS is an output if the M/S pin is
connected to HI (master mode) and an input if the M/S pin is connected to LO (slave mode).
Data is valid on the falling edge of the FS signal.
The frequency of FS is defined as the sampling rate of the TLV320AIC13 and derived from the master clock MCLK
as followed (see Section 3.1 Operating Frequencies for details):
FS = MCLK / (16
× P × N × M)
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| TLV320AIC13IDBT | 功能描述:接口—CODEC Lo-Pwr Mono Voice Band CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC13IDBTG4 | 功能描述:接口—CODEC Lo-Pwr Mono Voice Band CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC13IDBTR | 功能描述:接口—CODEC Lo-Pwr Mono Voice Band CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC13IDBTRG4 | 功能描述:接口—CODEC Lo-Pwr Mono Voice Band CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC14 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC |
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