參數(shù)資料
型號: TLV320AIC13I
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO30
封裝: PLASTIC, SOP-30
文件頁數(shù): 21/55頁
文件大小: 455K
代理商: TLV320AIC13I
3–15
3.9
Control Register Programming
The TLV320AIC13 contains six control registers that are used to program available modes of operation. All register
programming occurs during the control frame through DIN. New configuration takes effect after a delay of one frame
sync FS except the software reset, which happens after 6 MCLKs from the falling edge of the next frame sync FS.
The TLV320AIC13 is defaulted to the programming mode upon power up. Set bit 6 in control register 1 to switch to
continuous data transfer mode. If the 15+1 data format of DIN has been selected, the LSB of the DIN to 1 to switch
from continuous data transfer mode to programming set mode. Otherwise, either the device needs to be reset or the
host port writes 0 to bit D6 of control register 1 during the continuous data transfer mode to switch back to the
programming mode.
3.9.1
Data Frame Format
D0
D15 – D1
A/D and D/A Data
D15 – D0
A/D and D/A Data
D15 – D0
DIN
(15+1) Bit Mode
(Continuous Data Transfer Mode Only)
DOUT
(16 Bit A/D Data)
DIN
16 Bit Mode
DOUT
16 Bit Mode
Control Frame
Request
Figure 3–19. Data Frame Format
3.9.2
Control Frame Format (Programming Mode)
During the control frame, the DSP sends 16-bit words to the SMARTDM(TM) through DIN to read or write control
registers shown in Table 3–5. The upper byte (Bits D15–D8) of the 16-bit control-frame word defines the read/write
command. Bits D15–D13 define the control register address with register content occupied the lower byte D7–D0.
Bit D12 is set to 0 for a write or to 1 for a read. Bit D11 in the write command is used to perform the broadcast mode.
During a register write, the register content is located in the lower byte of DIN. During a register read, the register
content is output in the lower byte of DOUT in the same control frame, whereas the lower byte of DIN is ignored.
3.9.3
Broadcast Register Write
Broadcast operation is very useful for a cascading system of SMARTDM DSP codecs in which all register
programming can be completed in one control frame. During the control frame and in any register-write time slot, if
the broadcast bit (D11) is set to 1, the register content of that time slot is written into the specified register of all devices
in cascade (see Figure 3–21). This reduces the DSP’s overhead of doing multiple writes to program same data into
cascaded devices.
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