參數(shù)資料
型號(hào)： TLV320AIC13I
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PDSO30
封裝： PLASTIC, SOP-30
文件頁數(shù)： 28/55頁
文件大?。?/td> 455K
代理商： TLV320AIC13I
4–5
Table 4–6. A/D PGA Gain (Continued)
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
0
0
1
0
1
ADC input PGA gain = -23dB
0
0
1
0
1
0
ADC input PGA gain = -24 dB
0
0
1
0
1
ADC input PGA gain = -25 dB
0
0
1
0
ADC input PGA gain = -26 dB
0
0
1
ADC input PGA gain = -27 dB
0
0
1
0
ADC input PGA gain = -28 dB
0
0
1
0
1
ADC input PGA gain = -29 dB
0
0
1
0
ADC input PGA gain = -30 dB
0
0
1
0
1
ADC input PGA gain = -31 dB
0
0
1
0
1
0
ADC input PGA gain = -32 dB
0
0
1
0
1
ADC input PGA gain = -33 dB
0
0
1
0
ADC input PGA gain = -34 dB
0
0
1
ADC input PGA gain = -35 dB
0
0
1
0
ADC input PGA gain = -36 dB
0
0
1
0
1
ADC input PGA gain = -37 dB
0
0
1
0
ADC input PGA gain = -38 dB
0
0
1
ADC input PGA gain = -39 dB
0
0
1
0
ADC input PGA gain = -40 dB
0
0
1
ADC input PGA gain = -41 dB
0
0
ADC input PGA gain = -42 dB
4.6
Control Register 5B
D7
D6
D5
D4
D3
D2
D1
D0
0
1
DAGAIN
R/W
NOTE: R = Read, W = Write
Table 4–7. Control Register 5B Bit Summary
BIT
NAME
RESET
VALUE
FUNCTION
D7-D6
Control
Register 5B
NA
D5-D0
DAGAIN
101010
D/A converter gain (see Table 4–8)
NOTES:
7. In register read operation, first read receives ADC gain value, second read receives DAC gain value, third receives register 5C, and
fourth receives register 5D.
8. PGA default value = 101010b (0dB) for both ADC and DAC.
Table 4–8. D/A PGA Gain
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
0
1
1
DAC input PGA gain = MUTE
0
1
1
0
DAC input PGA gain = 20 dB
0
1
1
0
1
DAC input PGA gain = 19 dB
0
1
1
0
DAC input PGA gain = 18 dB
0
1
1
0
1
DAC input PGA gain = 17 dB
0
1
1
0
1
0
DAC input PGA gain = 16 dB
0
1
1
0
1
DAC input PGA gain = 15 dB
0
1
1
0
DAC input PGA gain = 14 dB
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