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SLAS653 – FEBRUARY 2010
Page 1 / Register 46 (0x2E): MICBIAS
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Device software power down is not enabled.
1: Device software power down is enabled.
D6–D4
R/W
000
Reserved. Write only zeros to these bits.
D3
R/W
0
0: Programmed MICBIAS is not powered up if headset detection is enabled but headset is not inserted.
1: Programmed MICBIAS is powered up even if headset is not inserted.
D2
R/W
0
Reserved. Write only zero to this bit.
D1–D0
R/W
00
00: MICBIAS output is powered down.
01: MICBIAS output is powered to 2 V.
10: MICBIAS output is powered to 2.5 V.
11: MICBIAS output is powered to AVDD.
Page 1 / Register 47 (0x2F): MIC PGA
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
1
0: MIC PGA is controlled by bits D6–D0.
1: MIC PGA is at 0 dB.
D6–D0
R/W
000 0000
000 0000: PGA = 0 dB
000 0001: PGA = 0.5 dB
000 0010: PGA = 1 dB
...
111 0110: PGA = 59 dB
111 0111: PGA = 59.5 dB
111 1000–111 1111: Reserved. Do not write these sequences to these bits.
Page 1 / Register 48 (0x30): Delta-Sigma Mono ADC Channel Fine-Gain Input Selection for
P-Terminal
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
00: MIC1LP is not selected for the MIC PGA.
(1) (2)
01: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D5–D4
R/W
00
00: MIC1RP is not selected for the MIC PGA.
01: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D3–D2
R/W
00
00: MIC1LM is not selected for the MIC PGA.
01: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D1–D0
R/W
00
Reserved. Write only zeros to these bits.
(1)
Program page 1 / register 48 andf page 1 / register 49, bits D7–D6 with same value.
(2)
Input impedance selection affects the microphone PGA gain. See the
Analog Front End section for details.
Page 1 / Register 49 (0x31): ADC Input Selection for M-Terminal
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6(
R/W
00
00: CM is not selected for the MIC PGA.
1) (2)
01: CM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: CM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: CM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D5–D4
00
00: MIC1LM is not selected for the MIC PGA.
01: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D3–D0
R/W
0000
Reserved. Write only zeros to these bits.
(1)
Program page 1 / register 48 andf page 1 / register 49, bits D7–D6 with same value.
(2)
Input impedance selection affects the microphone PGA gain. See the
Analog Front End section for details.
Copyright 2010, Texas Instruments Incorporated
REGISTER MAP
105