www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Page 0 / Register 2:
Codec Sample Rate Select Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D4
R/W
0000
ADC Sample Rate Select
0000: ADC FS = FSref/1
0001: ADC FS = FSref/1.5
0010: ADC FS = FSref/2
0011: ADC FS = FSref/2.5
0100: ADC FS = FSref/3
0101: ADC FS = FSref/3.5
0110: ADC FS = FSref/4
0111: ADC FS = FSref/4.5
1000: ADC FS = FSref/5
1001: ADC FS = FSref/5.5
1010: ADC FS = FSref/ 6
1011–1111: Reserved; do not write these sequences.
Note: ADC sample rate must be programmed to same value as DAC sample rate
D3-D0
R/W
0000
DAC Sample Rate Select
0000 : DAC FS = FSref/1
0001 : DAC FS = FSref/1.5
0010 : DAC FS = FSref/2
0011 : DAC FS = FSref/2.5
0100 : DAC FS = FSref/3
0101 : DAC FS = FSref/3.5
0110 : DAC FS = FSref/4
0111 : DAC FS = FSref/4.5
1000 : DAC FS = FSref/5
1001: DAC FS = FSref/5.5
1010: DAC FS = FSref/ 6
1011–1111 : Reserved; do not write these sequences.
Page 0 / Register 3:
PLL Programming Register A
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PLL Control Bit
0: PLL is disabled
1: PLL is enabled
D6–D3
R/W
0010
PLL Q Value
0000: Q = 16
0001 : Q = 17
0010 : Q = 2
0011 : Q = 3
0100 : Q = 4
…
1110: Q = 14
1111: Q = 15
D2–D0
R/W
000
PLL P Value
000: P = 8
001: P = 1
010: P = 2
011: P = 3
100: P = 4
101: P = 5
110: P = 6
111: P = 7
Copyright 2006–2008, Texas Instruments Incorporated
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