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參數(shù)資料
型號: TLV320AIC31IRHBTG4
廠商: Texas Instruments
文件頁數(shù): 64/84頁
文件大小: 0K
描述: IC STEREO AUDIO CODEC LP 32-VQFN
標準包裝: 250
類型: 立體聲音頻
數(shù)據(jù)接口: PCM 音頻接口
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標準 ADC / DAC (db): 92 / 100
動態(tài)范圍,標準 ADC / DAC (db): 92 / 100
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 帶卷 (TR)
配用: 296-19476-ND - KIT EVAL/DEMO FOR TLV320AIC31
296-19475-ND - MODULE EVAL FOR TLV320AIC31
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Page 0 / Register 97:
Real-time Interrupt Flags Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R
0
HPLOUT Short Circuit Detection Status
0: No short-circuit detected at HPLOUT driver
1: Short-circuit detected at HPLOUT driver
D6
R
0
HPROUT Short Circuit Detection Status
0: No short-circuit detected at HPROUT driver
1: Short-circuit detected at HPROUT driver
D5
R
0
HPLCOM Short Circuit Detection Status
0: No short-circuit detected at HPLCOM driver
1: Short=circuit detected at HPLCOM driver
D4
R
0
HPRCOM Short Circuit Detection Status
0: No short-circuit detected at HPRCOM driver
1: Short-circuit detected at HPRCOM driver
D3-D2
R
00
Reserved. Write only '00' to these bits.
D1
R
0
Left ADC AGC Noise Gate Status
0: Left ADC Signal Power Greater than Noise Threshold for Left AGC
1: Left ADC Signal Power Lower than Noise Threshold for Left AGC
D0
R
0
Right ADC AGC Noise Gate Status
0: Right ADC Signal Power Greater than Noise Threshold for Right AGC
1: Right ADC Signal Power Lower than Noise Threshold for Right AGC
Page 0 / Register 98–100:
Reserved Registers
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
00000000
Reserved. Write only '00000000' to these bits.
Page 0 / Register 101:
Additional Clock Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D1
R/W
0000000
Reserved. Write only '0000000' to these bits.
D0
R/W
0
CODEC_CLKIN Source Selection
0: CODEC_CLKIN uses PLLDIV_OUT
1: CODEC_CLKIN uses CLKDIV_OUT
Page 0 / Register 102:
Clock Generation Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D6
R/W
00
CLKDIV_IN Source Selection
00: CLKDIV_IN uses MCLK
01: Reserved. Do not use.
10: CLKDIV_IN uses BCLK
11: Reserved. Do not use.
D5-D4
R/W
00
PLLCLK_IN Source Selection
00: PLLCLK_IN uses MCLK
01: Reserved. Do not use.
10: PLLCLK _IN uses BCLK
11: Reserved. Do not use.
D3-D0
R/W
0010
Reserved. Write only '0010' to these bits.
Page 0 / Register 103–127:
Reserved Registers
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R
00000000
Reserved. Do not write to these registers.
Copyright 2006–2008, Texas Instruments Incorporated
67
Product Folder Link(s): TLV320AIC31
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