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參數(shù)資料
| 型號(hào)： | TMP89FH42UG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 10 X 10 MM, 0.80 MM PITCH, LEAD FREE, PLASTIC, LQFP-44 |
| 文件頁(yè)數(shù)： | 254/317頁(yè) |
| 文件大?。?/td> | 6434K |
| 代理商： | TMP89FH42UG |
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When the IMF is "0" or when the IMF is "1" and the EF5 (the individual interrupt enable flag for the
time base timer) is "0", the operation is restarted by the instruction that follows the IDLE0 mode acti-
vation instruction.
2.3.5.2
Dual-clock mode
The gear clock (fcgck) and the low-frequency clock (fs) are used for the operation in the dual-clock mode.
The main system clock (fm) is generated from the gear clock (fcgck) in the NORMAL2 or IDLE2 mode,
and generated from the clock that is a quarter of the low-frequency clock (fs) in the SLOW1/2 or SLEEP0/1
mode. Therefore, the machine cycle time is 1/fcgck [s] in the NORMAL2 or IDLE2 mode and is 4/fs [s] in
the SLOW1/2 or SLEEP0/1 mode.
P03 (XTIN) and P04 (XTOUT) are used as the low-frequency clock oscillation circuit pins. (These pins
cannot be used as I/O ports in the dual-clock mode.)
The operation of the TLCS-870/C1 Series becomes the single-clock mode after reset release. To operate it
in the dual-clock mode, allow the low-frequency clock to oscillate at the beginning of the program.
(1)
NORMAL2 mode
In this mode, the CPU core operates using the gear clock (fcgck), and the peripheral circuits operate
using the gear clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
(2)
SLOW2 mode
In this mode, the CPU core and the peripheral circuits operate using the clock that is a quarter of the
low-frequency clock (fs).
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
Set SYSCR2<SYSCK> to switch the operation mode from NORMAL2 to SLOW2 or from SLOW2
to NORMAL2.
In the SLOW2 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
(3)
SLOW1 mode
In this mode, the high-frequency clock oscillation circuit stops operation and the CPU core and the
peripheral circuits operate using the clock that is a quarter of the low-frequency clock (fs).
This mode requires less power to operate the high-frequency clock oscillation circuit than in the
SLOW2 mode.
In the SLOW mode, some peripheral circuits become the same as the states when a reset is released.
For operations of the peripheral circuits in the SLOW mode, refer to the section of each peripheral
circuit.
Set SYSCR2<XEN> to switch the operation between the SLOW1 and SLOW2 modes.
In the SLOW1 or SLEEP1 mode, outputs of the prescaler and stages 1 to 8 of the divider stop.
(4)
IDLE2 mode
In this mode, the CPU and the watchdog timer stop and the peripheral circuits operate using the gear
clock (fcgck) or the clock that is a quarter of the low-frequency clock (fs).
TMP89FH42
Page 25
RA004
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相關(guān)代理商/技術(shù)參數(shù) |
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| TMP89FH42UG(JZ) | 制造商:Toshiba America Electronic Components 功能描述:MCU 8BIT 16384BYTES FLASH 44LQFP |
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